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Trying to use a 2N7000 mosfet as audio amplifier...

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Externet

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An existent LM4863 power amplifier IC needs to be fed by at least 100mV rms to yield the desired level at the speaker, as probed in its 'normal' operation.

A piezoelectric microphone needs to be applied to the input instead, and thought a 2N7000 N-channel-enhancement mosfet could be of use as single stage preamplifier (as I have 2000+ pieces in need of use)
But no, cannot get a decent level. Would it be possible to use a 2N7000 ?
Battery is 4.0V.
Gate is between 1MΩ to +; and 1MΩ to gnd.
Drain has 1KΩ to + and source 1KΩ to +
Output is after 1μF at the drain.

Any suggestions ? Raise value to both MΩ resistors ? Or is it a lost case ?
 
Here is a circuit that requires an input of ~2mV to get an output of 108mV (Gain slightly over 50). I tailored the freq response to voice. This should make a reasonable mic preamp.

R4 is a down-stream load to make the sim realistic. If yours is much lower than 50K, we will have to revisit the simulation.

368.gif
 
Thanks gentlemen.
Ron: my goofy typing should be "Drain has 1KΩ to + ; and source has 1KΩ to gnd"

Mike: Will assemble that simulation and will report later.
Being the attachment blurry on my end, I will take Cin as 220nF; Cout 470nF ; Gate 5MΩ to drain ; Drain 20KΩ to + ; load 47KΩ.

The input impedance of the existing power amplifier and its gain is unknown.
 
Do you know roughly the output impedance of the mic? If it's high (unlikely) it will reduce the gain of Mike's circuit somewhat at the high end of the frequency response.
 
Clearer schematic:
368a.gif
 
Is the mic just a naked piezo disc, rather than the usual electret type with built-in FET buffer?
 
Not a condenser electret. A plain thinly coated with silicone piezo disc, no buffer. I wish I could somehow fully waterproof an electret instead.
 
Not a condenser electret. A plain thinly coated with silicone piezo disc
Ah, in that case the mic behaves approximately as a voltage source in series with a capacitor and the amplifier response is going to drop off rapidly with decreasing frequency; not at the top end as I said in post #5. How level a frequency response do you need, and what distortion can you tolerate?
Here's a sim using the simplest model I could find for a bare piezo transducer. How accurate the model is I don't know. Looks as though frequency compensation will be needed.
PiezoMicModel&Amp.PNG
 
Thanks, alec_t.
Similar circuit as the previous one on #3
±4dB along 300Hz to 3KHz is just fine, 5% distortion is tolerable. I believe the resonance of the piezo disc is around 4KHz, not of concern.

Design notes I previously referred to, prefers a source resistor as well as the drain resistor. Please educate me what they differ in behavior.

Also, gate resistors suggested were to + and to gnd instead of + bias only. Please educate me what they differ in behavior.

Mosfet.png


What differs in biasing the gate from drain or directly to + ? Some AGC behavior ? Please educate me.

The 2N7000 data sheet suggested 2.1V at the gate, if I remember well. Please educate me on optimally biasing this particular circuit, or if the single 1MΩ is just fine.*

* Edited : OK, the Q point should be above the Vth, into the triode/ohmic region, and the single bias resistor to + should be fine.
 
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What differs in biasing the gate from drain or directly to + ?
The Vgs(th) at which the 2n7000 just begins to conduct has a 'typical' value of 2.1V but can be anywhere from 0.8V to 3V according to the datasheet. If you bias the gate from the drain then as the gate voltage Vg tries to rise above the Vgs(th) the drain voltage falls to compensate the change automatically. If you use the bias arrangement in post #12 then you have to guess what Vgs(th) is and accordingly decide in advance what you want the gate voltage to be. Without the source resistor the FET current would be unpredictable. With the source resistor, the current adjusts such that the source voltage Vs rises to make Vgs = Vgs(th).
 
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