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transfer function for LDO regulator

Discussion in 'Mathematics and Physics' started by anhnha, Mar 21, 2014.

  1. anhnha

    anhnha Member

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    Hi.

    I am reading about LDO (low dropout regulator ). I get stuck in finding the transfer function Vfb/Vref as in the picture below. Please help me find out where I am wrong. Thanks.

    ldo000-png.85061
     

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  2. MrAl

    MrAl Well-Known Member Most Helpful Member

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    Hi,

    First question is where did you get this article from? Sometimes they establish certain ways of doing things that we have to know before we can follow the problem correctly. Other times they just make mistakes.

    Without looking at anything else, there are a few things wrong here. First as you noted, the amplifiers are stated as having a transconductance yet they also have an output resistance. An amplifier with a transconductance is modeled as a voltage controlled current source, and a current source with series resistance is still just a current source because the resistance does not limit the current. Since the network on the output of the first amplifier is an R and C, that would imply that the only factor involved here is the current and capacitance as the series resistance would play no role. Thus the statements that the amplifier is specified as having a transconductance and also has an output resistance and also has a series resistance on the output are incompatible. This leads us to believe that you are right about these amplifiers being really specified as having a voltage gain (with the then compatible output resistance) is true or else they are following a previously established non conventional convention that we need to learn first.

    Going with the idea that both amplifiers are voltage amplifiers with known output resistance, and seeing that they want the open loop calculation (not the closed loop calculation) we have the following equation for the feedback voltage Vfb:
    Vfb=(Ga*Gp*Vref*Z)/((Cpar*Roa*s+1)*(Z+Ro))*(R1/(R1+R2))

    Note that i presented this in a form that has the R1/(R1+R2) term factored because they presented it that way.
    Also note that in my expression we see Ro as well as Roa, and Ro is their "Ro-pass", which for some strange reason does not appear at all in their equation.

    Because of this last note, we might figure that the first amplifier is a voltage amplifier, and the second amplifier is a voltage controlled current source, but then why specify the output resistance of the second amplifier too.

    So there are a few incompatibilities here which need to be cleared up. If you can refer us to the original whole text we might be able to figure out what they wanted to tell us. Alternately, we can look around the web for more information on the analysis of the LDO independent of this article.

    Just to note, this subject is also of interest to me as well because i just got some LDO's that i wouldnt mind looking at in more depth as well as you.
     
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  3. steveB

    steveB Well-Known Member Most Helpful Member

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    Hi Mr Al,

    I was also puzzled by the presentation shown. My thought about the output resistance on the current sources is that perhaps they are parallel and not series resistance. But, even if that is the case, I'm still confused by a number of things shown there. It just doesn't look like the standard way of showing things. At least, it is not what I'm used to.

    Analysis of an LDO is fairly straightforward however. If we had the schematic of the actual circuit, it is likely we could figure out what was done. Long before LDO's were in vogue, I would make my own with an opamp. One version I made used a transconductance amp drive a PNP transistor. This topology was quite good in that it was much better at rejecting noise than the first LDOs that came out. But, the best modern ones are outstanding because they are more tolerant to load variations than this basic approach.

    So, with my simple example, I would have a transconductance amp driving the transistor, and I would model the transistor as a current controlled current source. But, that does not appear to be what they show there. Hence, without a schematic, or clarification of what the schematic means exactly, I'm stumped on making any suggestions.
     
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  4. dave

    Dave New Member

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  5. steveB

    steveB Well-Known Member Most Helpful Member

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    Having just said that made me think of something. If we think of the transconductance amp driving the Cpar capacitance to generate a voltage, one can imagine a P channel mosfet for the transistor and then the transconductance model gmp makes sense. Let's try that and see if it works.
     
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  6. anhnha

    anhnha Member

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    Thank you, Mr Al and Steve.
    The article is a thesis "Current Efficient, Low Voltage, Low Dropout Regulator" by Gabriel Alfonso Rincon - Mora.
    I attached the article below. The part above is in chapter 2 "System Design Considerations", pp 17.
    @ Mr Al:
    I am trying to derive the function you got. That is a bit different from the one given but I hope it is a mistake.
    @ Steve:
    I tried that before and the result are totally different.
    (there is no Roa in the expression in this way)
     

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    • ldo.pdf
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  7. anhnha

    anhnha Member

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    Hi.
    I got this expression by considering the voltage at the inverting input of the amplifier is 0V.
    But why should we do that? Why don't we directly calculate closed loop gain?
     
    Last edited: Mar 21, 2014
  8. anhnha

    anhnha Member

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    Hi.
    I just see another article here that is similar but more complete.
    Link: https://fenix.tecnico.ulisboa.pt/downloadFile/2589866706186/LDO.pdf
    The part mentioned is from chapter 3, Stability and PSRR.
    The author drew the small signal model:
    (two error amplifiers)

    ?temp_hash=1ea5138d8b16042058f47dea09547cc8
    And this is the voltage derived from that model that makes sense.

    ?temp_hash=1ea5138d8b16042058f47dea09547cc8
     

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  9. MrAl

    MrAl Well-Known Member Most Helpful Member

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    Hi,

    I calculated the open loop gain because that's what the article did. I would not hesitate to do the whole loop if we wanted it. I was trying to match their result, that's about it, so we would know what they were doing if that was possible.

    BTW that author sounds familiar. I think he did some work on rechargeable battery modeling.

    Steve:
    That sounds interesting too. I bought some of these not because i really needed the LDO so badly but because they were reasonably priced and have the input range i needed and the accuracy over temperature (automotive application). I'm quite sure these are the PNP variety which makes them inherently unstable. That's what i was hoping to look into more at some point.
     
    Last edited: Mar 22, 2014
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  10. MrAl

    MrAl Well-Known Member Most Helpful Member

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    Hello again,

    I am using a new post here because this more directly addresses the original problem.

    Steve's guess was right, and now knowing the author and due to the author's notoriety i would not think the paper would be too far off. This leads us to the same equation he got, for what it is worth, at least for the most part.

    The circuit is not drawn in the usual way that's what made this a little tricky. The right way would be to show Roa going from the output of the first op amp to ground, and Ro (second amp) going from the output to Vin, and of course then the amplifiers are true voltage controlled current sources with gains gma and gmp which are in fact transconductances. For some reason Ro is left out however. So the result for the open loop gain is:
    (gma*gmp*Roa*Vref)*Z/(Cpar*Roa*s+1)*(R1/(R1+R2))

    just like the paper states. Why Ro is left out might be because it goes to Vin. Ro is however included later in the analysis.

    If you really want the closed loop variation then we can do that unless you have already done that.
     
    Last edited: Mar 22, 2014
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  11. anhnha

    anhnha Member

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    Hi.
    Thanks for the replies. I have some questions and need more help.
    1. I don't understand this? Why we can leave Ro out as it goes to Vin?
    2. I just don't understand why we use the open-loop instead of closed-loop here. The circuit is actually in closed-loop. What is the purpose of open loop analysis?
    3. Why in the open loop analysis the inverting voltage of the amplifier is zero?
     
  12. steveB

    steveB Well-Known Member Most Helpful Member

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    I've attached a schematic of a "quick and dirty" LDO I designed to be used to power A/D converters that required very low noise. This is going back many decades, before the many good quality LDOs became available. At that time I bought an LDO off the shelf. Without doing much research on them, I just figured they would be just as effective as an 7805 or other standard regulator. I could not have been more wrong. The off the shelf parts has noise rejection only to about 1kHz which is unsuitable for rejecting switcher noise and other high frequency noise in a typical system. Remember these are old days now, and I would be fired to use this now instead of an off the shelf LDO in a SOT package.

    Anyway, this arrangement uses a current drive on the PNP transistor, rather than the typical voltage drive mode common back then. The voltage drive off the top rail allows power supply noise to directly inject into the output and it even gets exaggerated by the transistor exponential curve. This then requires a very high bandwidth feedback to reject the noise, which is challenging. In my approach, the current drive prevents the direct injection of the power supply noise and works effectively as a filter. I eventually found that this arrangement has some very nice properties including a filtering effect and good operation even when the supply voltage drops below the LDO control voltage. You lose the regulation of course, but the circuit operates and still filters noise.

    Anyway, I just thought it would be interesting to show one of my old useless relics from the past.
     

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  13. steveB

    steveB Well-Known Member Most Helpful Member

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    Sometimes you can leave values out if they don't affect the answer very much. If Ro is large enough, it can be neglected. You have to look at the values to see if the approximation is valid.

    Classic control analysis uses open loop response as a guide to understanding stability and tuning. The concepts of gain and phase margin come into play here. This is an older way to design, but it works well for many systems. The open loop response can guide you as to whether P, PI or PID control is desired. Then, with the proper choice of feedback type, the gains can be set to provide an open loop response with adequate gain margin (i.e. typically 12 dB) and phase margin (i.e. typically 45 degrees). Then you know the closed loop system will will be stable.

    I don't understand this question. Can you elaborate?
     
  14. anhnha

    anhnha Member

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    Thank you.
    Relating the Ro, I have just noticed that actually Ro is not left out at all. It is already included in the expression of Z (in the original article) or Zo (in the post #7 article).
    Here is the small signal model for calculating Vfb/Vref:
    (in this model there are two error amplifiers while the original is only one)

    small-signal-model-for-ldo-png.85088
    This is the Z from the original article.
    Z is the impedance seen at Vout:
    ?temp_hash=32490a0cbde68a8610e392ba0359d351
    Rx is the resistance seen from Vout back into the regulator:
    ?temp_hash=32490a0cbde68a8610e392ba0359d351
    (Ro that Mr Al said is Ro-pass in this expression)

    Similarly, in the second article Ro is also included in the expression of Zo.

    av-for-ldo-png.85089
    ?temp_hash=32490a0cbde68a8610e392ba0359d351

    With question 3. Here is part of the article that I can't get:

    For the AC analysis proposed, the feedback loop can be broken at point A in figure, assuming an infinitely large inductor as inserted at this point, which allows ”break” the AC contribution for the feedback loop.

    ?temp_hash=32490a0cbde68a8610e392ba0359d351
    With an infinitely large inductor inserted at the point A, in AC condition, what is the voltage at the inverting of the amplifier?
    I think it is floating. However, from the calculation Vfb/Vref I see that it must be 0V to get the right expression.
     

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  15. MrAl

    MrAl Well-Known Member Most Helpful Member

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    Hi again,

    anhnha:
    If you look back you will see that i mentioned that Ro was used in the following equation so it was included there.

    Steve:
    That's an interesting circuit too. My only question would be why three transistors. Did that result in some better stability or something?
    Unfortunately the circuit i am using does not have a good internal diagram because it came from Texas Instruments. National Semiconductor was better at showing their internal parts. TI just shows a 'functional' diagram with scant details.
     
  16. steveB

    steveB Well-Known Member Most Helpful Member

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    The way to think about it is to assume that there is an input source driving V-. Your second reference does this, but for some reason your first reference traces back to Vref, which I don't understand. The open loop response is supposed to break the loop and it considers the start of the break as an input and the end of the break as an output. So, it's not floating, and it's not 0V. It is an arbitrary voltage coming from a hypothetical voltage source.
     
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  17. steveB

    steveB Well-Known Member Most Helpful Member

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    There are a couple of different topologies one can imagine here, but the trick is to get enough gain from the transistors and to provide the proper bias voltages for the proper transistor operation. Also, the feedback must be negative, which forces some constraints. In the end, I found this topology good, but there may have been a two transistor arrangement that could work. I can't remember for sure now. You can see that the first transistor on the opamp does not provide current gain, but just provides the current drive for the transconductance gain. However, the two other transistors are providing quite a bit of the loop gain, with each contributing the transistor beta to the loop gain. The thing about the transistor gains is that they will eventually roll off at high frequency, and two of them will contribute 180 degree phase shift with greater than unity gain, and will thus jeopardize stability. Hence a stabilization is provided by the compensation cap on the the opamp circuit. The pole introduced here causes the high gain to roll off at lower frequency and generates adequate phase margin for loop stability.
     
  18. anhnha

    anhnha Member

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    Then, the voltage at the inverting input is V- which is not clear what value it is. However, from the way the expression Vref/Vfb is derived, I see that V- is assuming to be
    0V there.
    If so, is the result still valid? I means that the author calculated that expression only for a special case (V- =0) and use that result to draw properties about the circuit.
    Is that considered correct?

    I have read that the we need to put a buffer at the output of the error amplifier to ensure the circuit stable. Could you explain a bit?
    (Or maybe some links explaining why)
     
  19. MrAl

    MrAl Well-Known Member Most Helpful Member

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    Hi,

    What is being looked at is the open loop response. There are theories in the main body of control theory that deal with the open loop response which a long time ago made things easier to understand, as long as you understand the theories and why they work. It still makes it a little easier to understand today with the exception of the gain and phase 'margins' that the theory talks about where today with a little more updated theory we find that knowing those things isnt always enough. It's still interesting as a starting point however.
     
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  20. steveB

    steveB Well-Known Member Most Helpful Member

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    Generally, for open loop response, we do what I described above and consider V- as the input and Vfb as the output. That doesn't mean there are not other ways to analyze it. But, it's not clear to me why Vref is considered in the open loop response. Vref is an input, and inputs are not really relevant for stability in a linear analysis. However the feedback is what affects stability, and V- is part of the feedback path. Standard open loop analysis that considers gain/phase margins would consider V- and not Vref. So, I'm not exactly sure I understand the first reference, but your second reference is very clear. Note that I'm not saying the first reference is wrong, but only that I'm not following the logic of the presentation.

    As to the issue of buffering? I think it would depend on the exact implementation and circuit. Buffers are often desirable if you need to drive current, a transmission line or a high capacitance. But, they need to have high bandwidth to not hurt stability.
     
    Last edited: Mar 24, 2014
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