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SG3525 inverter current limiter

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mab2

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Hi all,

I have made a simple SG3525 based inverter, which I intend to use to dump excess solar power (at 28v) into a 240v immersion heater. The S3525 feedback cct is regulating the input voltage to 28v.

the 3525 drives two @IRFB4410 mosfets to generate a ~80Hz MSW into a standard 50Hz mains 110v/18-0-18 v transformer. this gives a 'peak' voltage of ~175v

I've been testing with a storage heater who's elements give a combined resistance of about 26.7 Ohms which gives a 'peak' current of 6.5A, which gives a theoretical mosfet current of ~40A (The IRFB4410 has a continuous I rating of 96A).

The inverter works OK, but if another load on the battery changes very suddenly it occasionally blows one of the mosfets. I've tried putting big capacitors across the feedback cct so the SG3525 reacts slowly, but this still doesn't protect the mosfets 100%.

Can anyone suggest an easy to incorporate current limiter cct modwhich will react fast enough to protect the mosfet (the 30A circuit breaker doesn't)?

Or should I parallel more mosfets to provide a bigger margin of error?

Thanks in advance for any advice.

mab2
 
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Can you post a schematic of your cct? With its load?

>EDIT>And by
if another load on the battery changes very suddenly
is the load change a sudden increase or decrease or either one?</EDIT>

It would help.
 
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hi,

hopefully there's a jpg attached. And hopefully it's accurate - my circuits go through a bit of evolution on board and I've had to draw the diagram anew.

as for the other load; it was a freezer running on another inverter - when the freezer turned on the surge caused the battery volts to drop sharply then come back up again. I think the fet failed as the volts came back up.

Thinking about that I could try a larger soft-start cap?

Thx

mab
 
Seems like some kind of over current detect inputted to pin 10 might do it but I'm not sure how to implement it.
 
Nor I! :)

I have increased the length of the wires between the 47,000uF and the fets, and I've not blown another fet yet, but that seems more of a botch than a solution.

I have thought of an op-amp monitoring the voltage drop on the wire between the 47,000uF and the fets, and pulling down pin 9 (comp) but wasn't sure it would react fast enough, and would only work with a long enough wire to have a decent voltage drop.
 
Could you put a cap between pin 2 and ground? That would slug the B+ change as seen by the IC. (I assume pin 2 is the voltage feedback pin. Haven't checked the IC datasheet so I may be talking rubbish).
 
Thanks for the replies.

Could you put a cap between pin 2 and ground?

yes, though the big cap on pin 9 (comp) already makes it very slow to react - I'm still not sure why it blew the fet - it hasn't blown one since I moved the cap further away so keeping my fingers crossed, but i would still like to make it more idiot proof.
 
I'm still not sure why it blew the fet
I've now checked the datasheet. If the pin 2 voltage suddenly drops in sympathy with B+ then it seems the chip will increase the pulse width to compensate, so FET current will be high for longer. I still think a cap on pin 2 would help.
Even without the 100uF cap on pin 9 its voltage should be fairly stable by virtue of the internal 5.8V zener on that pin. I'm surprised a cap that big is necessary. I would have expected ~0.1uF.
 
I've now checked the datasheet. If the pin 2 voltage suddenly drops in sympathy with B+ then it seems the chip will increase the pulse width to compensate, so FET current will be high for longer. I still think a cap on pin 2 would help.

Well I'll add one anyway - it can't hurt.

Even without the 100uF cap on pin 9 its voltage should be fairly stable by virtue of the internal 5.8V zener on that pin. I'm surprised a cap that big is necessary. I would have expected ~0.1uF

umm.. you must be looking at a different datasheet to mine (SG3525?) - pin 16 should be the ref voltage(5.1v) and pin 9 is the output from the error amplifier/ input to PWM comparator (hence the huge cap on there really slows the response).

thx

mab
 
pin 9 is the output from the error amplifier
You're right. Presumably the 5.8V internal zener is just to limit the amp output swing rather than stabilise the output. My bad. But wouldn't a 'small' (10uF?) cap on pin 2 have a much greater effect than the 'huge' cap (100uF) on pin 9, because the error amp input impedance is high whereas its output impedance is low?
 
But wouldn't a 'small' (10uF?) cap on pin 2 have a much greater effect than the 'huge' cap (100uF) on pin 9, because the error amp input impedance is high whereas its output impedance is low?

you're right it would, but the big cap on the output does work - I added it after I blew the 1st fet and now it takes a good 1/2 a second to respond to sudden changes on battery voltage - but it still didn't stop the 2nd fet from blowing. I could put a cap on pin 2 as well as / instead of the big cap on pin 9 but given how slow the response is already, I'm not certain slowing it down some more will help.

I was asking about current limiting ccts as I though there may be some very short term current peak mechanism that is beyond my understanding - (even with the SG3525 at max duty cycle the fet current is (theoretically) well within it's rating, although it would heat up if it stayed at max duty for long of course.
 
OK here are my set of dumb questions::eek:

It looks to me like the polarity of pin 2 might be opposite of what you want. To me it looks like a lower voltage increases the time the FETs are on.

The gain of the error amp seems very high (4.7k to 100K)

The error amp probably doesn't like that big cap hanging on it's output. A smaller one from the output to the negitive terminal might be better.
 
You may not have enough turns ratio on the transformer. A sudden battery load would drop the battery voltage causing the SG3525 to react and drive the duty cycle up on the transformer primary. If the switching gets too close to 50% you can get the cross conduction of MOSFET's.

Other potential problem is the transformer core is not large enough and is saturating a higher duty cycle drives.

Either way, check the switching duty cycle as you drop the battery voltage. You don't want to get much more then 40% duty cycle on each switching side.
 
Other potential problem is the transformer core is not large enough and is saturating at higher duty cycle drives.
I'd have to agree with that. FET current would then be limited essentially by just the coil resistance so could be very high.
 
Sounds like Transient Spikes distroying the Mosfets.

Put a Snubber Circuit across each of the Drains to the Transformer Center Tap.
 
wow! loads of ideas - thanks folks.

ronv - don't forget this is regulating the input voltage, not the output like a normal psu - it is working the right way for a dump load controller.

You may not have enough turns ratio on the transformer. A sudden battery load would drop the battery voltage causing the SG3525 to react and drive the duty cycle up on the transformer primary. If the switching gets too close to 50% you can get the cross conduction of MOSFET's.

duty cycle is currently limited by the default of the sg3525 (I need to check the datasheet again - but I think it's designed to have some deadtime even at max duty%). am I missing something? Is it possible to get cross conduction with dutycycle <50%?


Other potential problem is the transformer core is not large enough and is saturating a higher duty cycle drives.

Good idea there; I'm putting 28v into a winding designed to output 18v; I raised the frequency from 50Hz to ~80 to cater for this and it doesn't draw excessive current at max duty cycle (with the load resistance disconnected) but maybe I should try and scope the current draw under load...

Sounds like Transient Spikes distroying the Mosfets.

Put a Snubber Circuit across each of the Drains to the Transformer Center Tap.

hmm... this is beyond my ability to calculate - would 22ohms and, say 10nF work (picking numbers I've seen in HF PSUs :D )?
 
Good idea there; I'm putting 28v into a winding designed to output 18v; I raised the frequency from 50Hz to ~80 to cater for this and it doesn't draw excessive current at max duty cycle (with the load resistance disconnected) but maybe I should try and scope the current draw under load...?

If you are using a 18v to 155 vdc transformer you should be in good shape for duty cycle limit.

If the core is insufficient size and saturates as duty cycle exceed a particular point this would fit the problem.

Again, you need to get a variable DC input supply and check the duty cycle and current drain as you drop the battery voltage (loaded on output).
 
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