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Hope 434MHz Wireless RFM01/RFM02. Anybody used them?

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Ok so for the first config setting (Configuration Setting Command)
433 band
60kHz deviation
dont worry about CLK out and the internal capacitor setting.

the only other thing is the modulation polarity (ms)
so with the 60kHz deviation at 434Mhz
a 1 will be represented by 434.06MHz
and a 0 will be represented by 433.94
IF the ms bit is set to 1
and vice versa if set to 0?
Does it not matter as long as the receiver is the same?

So this is what I have for the first config register:
**broken link removed**

Any issues? or am i understanding everything so far?
 
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I think it's all right so far.
For load capacitance i would give a mid range value, because that effect's the Transmitter mid frequency. I've given there 11,5pF.

For further configuration it is importent, to know the schematic.
Because the modules can be configured for different operation modes.

My configuration looks like that.
Look at the schematic at the link i give you before.
volatile unsigned char uc_frequ[2]; /* Frequenz tuningword */
uc_frequ[1]=ui_frequ[uc_kanal]/256;
uc_frequ[1]|=0b10100000;
uc_frequ[0]=ui_frequ[uc_kanal]%256;
/* Configuration Setting: 433MHz, CLK 5MHz, 11,5pf Kapaz., +/-60kHz */
#asm ("cbi portb,nsel");
sendbyte(0b10001110);
sendbyte(0b01100000);
#asm ("sbi portb,nsel");
#asm ("nop");

/* Frequency Setting: eingestellter Kanal*/
#asm ("cbi portb,nsel");
sendbyte(uc_frequ[1]);
sendbyte(uc_frequ[0]);
#asm ("sbi portb,nsel");
#asm ("nop");

/* Output Power Command: Max Power */
#asm ("cbi portb,nsel");
sendbyte(0b10110000);
#asm ("sbi portb,nsel");
#asm ("nop");

/* Data Rate Command: 2400 bit/s */
#asm ("cbi portb,nsel");
sendbyte(0b11001000);
sendbyte(0b10001111);
#asm ("sbi portb,nsel");
#asm ("nop");

/* Low Batt + Sync Command: enable Sync Circuit */
#asm ("cbi portb,nsel");
sendbyte(0b11000010);
sendbyte(0b00100000);
#asm ("sbi portb,nsel");
#asm ("nop");

/* PLL Setting Command: 0xD240 up to 19,2kbit/s*/
#asm ("cbi portb,nsel");
sendbyte(0b11010010);
sendbyte(0b01000000);
#asm ("sbi portb,nsel");
#asm ("nop");

/* Power Managment Command= Enable Clock; disable Synthesizer; disable pow. Ampl. */
#asm ("cbi portb,nsel");
sendbyte(0b11000000);
sendbyte(0b00100000);
#asm ("sbi portb,nsel");
The configuration of the RFM01/02 is described at Datasheet of RF01 / 02 at the hopeRF Page.
 
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about RFM01 and RFM02

hello,,,
any body can help me how to programe RFM01 and RFM02 using ATEMEGA8535,, I am confused use this RF..

please help me..
Thanks before..
 
This is an ongoing project of mine which I work on when I have time.
Maybe we can help each other.
Where are you up to? Do you have the modules?
 
jakeselectronics, have you made any further progress? I've been looking into these modules for a few months with the idea of using the tx in a handheld controller. It seems that the RF02 chip differs enough from the RF12 to cause some challenges, and Hope's datasheets leave out enough essential information to boost the challenge to a high level. It looks like the RF02 is very similar to RFM's TXC101 and TXC102 which seem to operate in the same way (eg the RF02's status has undocumented PB bits, which look very much related to the TXC101's pushbutton feature, not implemented in the RF02). There is a lot of useful datasheets, application notes and other information on RFMs website site.
 
Probably the Datasheet of the used IC's will bring you forward.
Its the IA4220 ( =SI4220 ) and the IA4320 ( =SI4320 ).
The manufactor i've found is Integration.

Many thanks wkrug. These datasheets will be of great help. I notice the IA4220 also mentions the pushbutton feature and EEPROM mode of the TXC102 (not that any self-respecting PIC or AVR developer would want to use them), so I guess they are pretty much equivalent.

I had a look at your website that you posted earlier. Hopefully your experiences will be helpful in getting the full datalink to work. The Rx part looks to be an even greater challenge.
 
The Rx part looks to be an even greater challenge.
I don't think so.
The Receiver can be used with FiFo Buffer.
So you get an Interupt when 8 Bits are received.
Get that 8 Bits in an Interrupt routine and set a flag for further computing - That's all.
But there are different ways too, to get the target.
 
I don't think so.
The Receiver can be used with FiFo Buffer.
So you get an Interupt when 8 Bits are received.
Get that 8 Bits in an Interrupt routine and set a flag for further computing - That's all.
But there are different ways too, to get the target.

Thanks wkrug. Actually my uncertainties revolve around the receiver configuration. I have some comms background from an Engineering past, so I know the terminology, but not enough practical experience to make good choices. I've knocked up test programs for the Tx and Rx which I'll try out over the next week on a breadboard.

I have an obsession with understanding the operation of circuits in any new development, rather than just copying others' choices. I think such insights could also be useful to others working with these devices. I assume that the default POR parameters in the Tx and Rx chips would enable immediate communication to occur, and it's tempting to use those to start with. However some of them I don't understand.

The Tx I've set up with a 9600 bps transmission and a deviation of 30kHz in the 433MHz band. PLL Bandwidth set to the lowest setting (for a 19.6kHz max datarate). Apart from some snippets of recommendations gleaned from various forums and blogs, many Rx parameters seem to have no real basis for understanding what would be a good choice. The particularly difficult ones are:

Valid data indicator VDI is set to be always on in the POR configuration. I would have chosen it to be sourced from the data quality detector. Wouldn't this be the most sensitive and reliable one to choose?

The AFC frequency offset measurement is set in POR to be "kept" independent of the VDI. Wouldn't it be better to be kept only while receiving, or am I misunderstanding what this setting is doing?

The POR setting for data clock recovery is slow mode. The automatic (fast then drop to slow) would have been my choice. Would this cause problems?

The FIFO is the most puzzling. The POR settings enable the FIFO mode and choose the start condition to be reception of the syncron pattern, however it has bit 1 turned off which apparently stops the FIFO filling after synchron word reception. There seems to be a contradiction here. The FIFO mode is on and the start condition is selected, but it won't start filling after the start condition is detected!! This bit seems to be meant to be dynamically set and then later cleared by the microcontroller when it wants the FIFO to stop filling (maybe when the packet is known to have ended), so that the synchron pattern can be searched for again. I would have thought it would start off being set by POR.

Any comments on these? (sorry for the long post!). Maybe someone knows of any of these questions being answered elsewhere - I couldn't see much out there.

cheers, Ken
 
I my Application the maximum Range should be achieved.

So i choose a very low data Rate 1200 bit/s with a deviation about 20Mhz.

First i close the FiFo and open it again by sending this Sequence to the RFM01:

Code:
//FIFO Puffer initialisieren bei Fehlern und Datensatzende
void reset_fifo (void)    
{
    /* FIFO Command: Enable FIFO, IT level=8, Sync. Patt + VDI, stop FIFO  */
    #asm ("cbi portb,nsel");
    sendbyte(0b11001110);
    sendbyte(0b10001001);
    #asm ("sbi portb,nsel");
    #asm ("nop");
    
    /* FIFO Command: Enable FIFO, IT level=8, Sync. Patt + VDI, start FIFO  */
    #asm ("cbi portb,nsel");
    sendbyte(0b11001110);
    sendbyte(0b10001011);
    #asm ("sbi portb,nsel");
    #asm ("nop");
    uc_receivebyte=0;
}
After this the RFM waits for an VDI and the synchron Word 0xAA 0xAA 0xAA.
The following Bits will be putted into the FiFo.
After 8 Bits received i get it from the FiFo Buffer an wait for the next Byte.
When all Bytes of a Frame are received an Carriage Return was sent by Transmitter.
This is the Signal to Stop the Fifo and restart it again to receive the next Frame.

When you read out the FiFo via spi the first 8 Bits are status bits of the RFM followed by the 8 bits are in Fifo.

The RFM coud came out of Synchronisation by distortion of the carrier.
In this case the Fifo will be resetted by a Timer after 3 seconds.

I've checked that the AFC had a very wide Range.
When you'll use it a neighbor channer will be caught too.
When you need a lot of channels it's better to switch the AFC off.
When you want a maximum of Range the AFC shoud be turned on, because the Receiver has a little more sense in this case.
About the PLL you could only check out by try and error.
The maximum deviation is regulated by law in your country.
I would use the maximus thats allowed, or the standard that used in your country.

The complete Code you could download here: **broken link removed**
 
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Buying RFM01 & RFM02

Where can I buy RFM01 & RFM02 with postage to Africa at a reasonable price with prompt delivery. I am interested in adding wireless touch to my designs. Thanks.
 
Buying RFM01 & RFM02

Where can I buy RFM01 & RFM02 with postage to Africa at a reasonable price with prompt delivery. I am interested in adding wireless touch to my designs. Thanks.
 
thank you

thanks wkrug. I will be checking them out. I will keep you posted.
Sorry 4 d repeat post. Refreshing d page caused a repost.
 
thank you

thanks wkrug. I will be checking them out. I will keep you posted.
Sorry 4 d repeat post. Refreshing d page caused a repost.
 
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