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(hcf4017be) decade counter with 10 decoded outputs

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vinodquilon

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Look up the attached data sheet.
HCF4017BE

I have suffered one displeasing feature (most times useful) of this counter,
When the clock advances, decade counting also advances from 0 to 9 then 0 to 9 and so on.
That is at first LOW-to-HIGH clock edge "0" out is on, at second LOW-to-HIGH clock edge "1"
out is on, and so on. On reaching "9" again returns to "0" and so on.

Assume we manually switch off the counter supply at seventh LOW-to-HIGH clock edge "8" out is on.
But the problem is that when we power up the circuit again, the counter starts from out "9" not from
initial "0" when detecting first LOW-to-HIGH clock edge.

In most applications this is a good feature.

But look up other attachment.
automatic telephone off-hook using 4017

Here I set up a telephone ring detector to turn on off-hook relay
for 60 sec (by 555 mono), when 4017 detects 5th ring as Clock input. That is five LOW-to-HIGH clock (ring)
edges detected, then when goes to "6" out the counter automatically reset by the arrangement shown in schematic.
All these are done to count exactly 5 rings.

These arrangements normally working fine. But what happened when someone wouldn't complete 5 rings (missed call) ?
That is before completing 5 rings he deliberately cut his phone. Let us assume he disconnect his phone on 2nd ring.
Upon this condition when he tries to redial and want to turn on relay on 5 rings, relay will turn on before 5 rings
that is on 3rd ring. This occurs because of the property of 4017 by which it keeps track of all past (before power up also)
activities.

Is there any counters exist that has no past tracking feature. If I would get such a counter I will add one relay
at the output of opto-coupler, which will close power up connection of my counter when first ring signal occurs.
Thus the counter starts in a fresh mood to count exact no.of rings.

All suggestions are hearty welcoming ..........


In schematic 4017N decoder is placed, but the one I used is HCF4017BE. It has active HIGH pin 13.
 

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Yes, the 4017 in the design is set to count to N and recycle so it waits till it gets to N regardless of where the pulses (clock) is from. Real quick something that could maybe work is using a chip like a 555 in a missing pulse configuration. You would need to calculate the time approximately between rings (Pulses on ring signal) and set things up as a retriggerable one shot. The 555 output would be low and on rings go high. The output would remain high till the time between pulses exceeded the RC time set and the output would go low.

Maybe use that with a gate for pin 15 Reset? Just a guess.

Ron
 
for the reset you can either use 6th ring tone as in your diagram or a certain time interval between ring tones. you can take the out put of clock through an RC time delay(to feed as another reset when clock discontinues). if the clock is continuous(rings are available) then keep the input(reset) low via another smithtrigger.

if the clock discontinues (having a certain gap) then the reset(2nd reset) is not refreshed to remain at low, thus it will reset the IC and keeps it at start. when a new rigntone comes the 2nd reset as discribed goes low and IC is enabled for counting.

if you couldnt get what i explained, i may post you a circuit shortly. or some one can post it for you too.
 
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Hi,

I modified the circuit to automatically reset independent of the number of rings. Since three gates of the 4093 were orphants I used one to indicate "READY" state.

Delay time between the last ring and RESET is approximately 11 sec. The monostable is initiated by the first positive clock edge at pin 14 (CLK). Q1 through Q4 are ORed with diodes.

For power on reset add a 10K resistor from pin 15 of the counter to ground and 100nF cap to VCC.

Boncuk
 

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This is one example of why I design with a microcontroller. An 8 pin PIC chip and 6 components is all you need.
 
Boncuk,

if i have not understand wrongly, the 4 doides connected from 2nd to 5th out puts are not important, since as he said if the ring discontinues in between, then on of the input would be high and you will never get a reset output.

the clock input it self is enough to keep on refreshing, and if it will delay more than 11 sec as you said the system would reset and show ready position.
 
A much better and simpler design is to have two timing circuits that detect ringing for say 10 seconds but not longer than 20 seconds.
The result energises a relay for 60 seconds.
This can all be done with a 74c14.
 
Boncuk,

if i have not understand wrongly, the 4 doides connected from 2nd to 5th out puts are not important, since as he said if the ring discontinues in between, then on of the input would be high and you will never get a reset output.

the clock input it self is enough to keep on refreshing, and if it will delay more than 11 sec as you said the system would reset and show ready position.

The circuit is alright.

Assuming the caller quits calling after the second ring the counter will remain at this count and accumulate rings until the count of five is reached and hook up is initiated.

You probably overlooked C6 between the collector and the trigger input which causes a negative pulse to trigger the timer. This happens only if a new positive level appears at the base of the transistor. (Between pulses the voltage at the cathodes drops to ~ 4.6V with a VCC of +12V. Advancing the counter by one this voltage jumps to 11.5V) At other times R14 pulls the trigger input high. So the circuit is non retriggerable monostable.

Timing starts with the first clock pulse switching Q4 ON to keep the reset pin of the 4017 low. Timing has to be adjusted to time out at a time period longer than pauses between rings. So the circuit works like a missing pulse detector.

The OP mentioned that reset must be iniated at any count if the call was terminated before hook up (five rings).

The circuit complies with it.
 

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**broken link removed**
Firstly it is very difficult to identify exactly 5 rings. The following circuit can be adjusted for any timing and it allows 3 or 4 rings but not 5 or more rings.
It automatically turns off after about 2 minutes and takes less than 100uA:
 
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improved implementation !!!

Thanks everyone to bring attention to my problem * (hcf4017be) decade counter with 10 decoded outputs
* .All suggestions are very valuable.

See my attached link '4017' in first post.
Where I have made a slight change to fulfill my requirement ( I think this would be a simpler version than
all circuits presented by others here).

See the attachment in this last thread.

1.5 SEC is designed by R and C of 4093 to satisfy one telephone ringing interval. 74123 retriggerable mono shot is used here.
So Quasi length (0.33RC) of 74123 is selected a little higher than the sum of 1.5 & 1 sec.
Whenever there is no rings at input, Q/ output is logic HIGH which will reset 4017.
But this will introduce Delay time (1.5 SEC) between the last ring and RESET. But in practice we can neglect it as
not affecting our project aim in any way.

I think this is the most perfect circuit.
Design ------- Quasi length TAKEN 3.3 sec THEN C=100uF R=100K

If have any suggestions pls post.........
 

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The big problem with your circuit is this:

It will activate the output for any number of rings above 5. My circuit only accepts a coded number of rings.
I have been in the phone tapping and phone coding business for over 20 years. I developed the Infinity Bug over 15 years ago using a coded ring.

Your circuit is quite useless.
 
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The big problem with your circuit is this:

It will activate the output for any number of rings above 5. My circuit only accepts a coded number of rings.
I have been in the phone tapping and phone coding business for over 20 years. I developed the Infinity Bug over 15 years ago using a coded ring.

Your circuit is quite useless.

to eliminate this 5th output of the IC can be wired to Enable input, so that after the 5th ring it will not change its state.
 
The big problem with your circuit is this:

It will activate the output for any number of rings above 5. My circuit only accepts a coded number of rings.
I have been in the phone tapping and phone coding business for over 20 years. I developed the Infinity Bug over 15 years ago using a coded ring.

Your circuit is quite useless.

Hey Colin,
When fifth ring comes, it will activate the 555 to turn on off-hook relay. So there is no chance for any further ring signals to come. OK.........
 
to eliminate this 5th output of the IC can be wired to Enable input, so that after the 5th ring it will not change its state.

Draw the circuit. You are already using 4 chips to my single chip.

You have obviously never designed this type of circuit before because you are missing this:
You don't know the number of rings at the receiving end.
The receiving phone can pick up the end of half a ring and this will not be detected by the caller, but the circuit will see it as a full ring. That's why your circuit will not be reliable.
My time-reference is much more reliable and has a bigger window. You could gate three outputs but you have the problem of preventing 6+ rings energising the relay.
6+ rings has to be processed first, before the 5 rings can be initiated.
Look at my circuit and see how this has been done.
 
Maybe off topic but I always wondered about this part:

The receiving phone can pick up the end of half a ring and this will not be detected by the caller, but the circuit will see it as a full ring.

I don't notice that anymore here in the US with newer phones but years ago when the phone would ring (actually ring with bell on older phones) it wasn't unusual to hear a half ring but not hear it on the calling end. Matter of fact it wasn't unusual to make a call and never hear a ring on the calling end but the party would answer if they were sitting right on top of the phone. They would hear a half ring on their end and pick up the phone but the caller never heard it. I haven't heard a half ring in years here. However, I always wondered about it. Long forgotten till now. Never gave it anymore thought.

Ron
 
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