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Capacitor circuit and current flow

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Hi Colin,

I really dont think you are looking at the relationship between the inductor and capacitor quite right. I say this because you are saying that there can be no back EMF. Thus i have to question how you are interpreting this "back emf" as to what it really is and under what circumstances it can start to appear.

Any inductor that is charged is going to exhibit back emf at some time or another. To put in in a more clear way, once the inductor is charged it's going to want to discharge at some point, and that' s where the back emf becomes the driving force.

To start the capacitor is charged. Then the user closes the external switch. This causes current to flow into the solenoid coil. The coil acts as an inductance which charges up with a positive current where the capacitor is the driving force behind all the action so far.
Next the capacitor starts to run out of energy so it's voltage goes to zero. But the inductor still has energy and current flowing, so it generates a 'back emf' to keep the current flowing even though the cap voltage is zero. This drives the capacitor voltage negative. How far negative it does depends on the value of the capacitance and the value of the inductance.
Note here that the cap voltage does not go through zero just on it's own because it runs out of energy. It gets driven through zero by the inductor at some point.

Another way to look at it is like a step drive voltage into a resonant cap and inductor. A cap in series with an inductor has resonance as im sure you know. This causes a semi sinusoidal waveform to appear across the cap. We know that the current in an inductor driven by a sinusoidal voltage, when it changes from increasing to decreasing (at the peak) the voltage in the cap is going through zero. If there is nothing to stop the cap from going through zero the current in the coil will drive the cap voltage negative, and how negative it goes depends on how much energy is left in the coil, or simply the inductance value. Thus, some inductance values will drive it very negative, and some not as much, but they will always drive it negative unless we get so very lucky that the coil runs out of energy at the same time that the cap does.

The series resistance of course will play a part too if it can act as an over damper. It could eat up all the energy. But there we would be depending on luck.

So the bottom line is that some coils will cause a more severe reverse capacitor voltage than others. If the reverse diode is across the cap, it will clamp that voltage. If the diode is not there, the cap may act like a low resistance in the reverse direction and damp out the energy of the coil, but that's probably not a good idea.

If we were able to specify a specific solenoid for use (such as Acme 12345A) then we could analyze this in that light where we would have only one variable we could look at and determine if it worked or not. But if we dont have the liberty to spec that part ("connect any solenoid you want to the output") then we can not say for sure that there will never be any damaging back emf without the clamp diode.

So to clarify just a little bit more the situation we have here...
If we have a cap in series with an inductor where the inductor has internal series resistance, and the cap has some initial voltage, if we can not spec the inductor (and series resistance) we can not spec the negative undershoot without a clamp diode. It's as simple as that.
It works ok with one inductor but not another.

A scope picture of the cap voltage of an actual circuit working with an actual typical coil would be nice to see right about now. It would not be conclusive however, but it would be interesting.
 
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The theorists here are talking in generalities. I think Colin is talking about his circuit in a specific application. He has already said that the solenoid resistance is a few ohms. I did a little research, and it seems that point motor solenoid inductance is on the order of a few millihenries, at most. With this (switched) load, I think Colin is correct in saying that back EMF voltages will be zero, or at least insignificant.
 
Hello Roff,

So we see a better spec for the load now, that's not surprising seeing how the load changed from post to post in the past in this thread :)

But we still cant be sure every user will always use a low inductance solenoid. There is just no way to make sure of that unless we ourselves can spec the solenoid or solenoids.
If he is so sure then what is the diode doing there?

So it sounds a bit better, but how much money would we be willing to bet that there is never any damaging back emf with whatever the end user decided to throw at it? If it were my company producing this product I would put the diode in (as he must have done already) and be done with it.
 
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In fact, in this circuit, there should be two diodes, in series, on the output. Thank you for pointing this out.
I have made a terrible mistake.
 
For what it's worth, Colin55, If I had had your circuit while I was into HO scale railroading, I wouldn't have burned so many switch machines with those almost worthless, sticky atlas controllers. However it works theoretically, it evidently does the job you intended it to do, and does it well.
 
The back EMF will NEVER rise above the delivery voltage to the inductor because the delivery voltage NEVER turns OFF and it certainly does not turn off rapidly and thus back EMF does not occur. I have mentioned this previously but my statement was not understood. I'm afraid that LTSPICE, Ohm's Law & I all beg to differ.

I don't see the relevance of this statement. Roff has answered this point.
The two diodes on the output can be removed and the circuit will function exactly as before.
I have simulated the circuit - see attachments.

These clearly show the back EMF & how it discharges the caps & charges them in the negative direction until diode D2 clamps the voltage at about -0.71 Volt.

I don't know what the solenoid inductance is, so I assumed 2H.

However, even if you do the sim with L = 10 mH, the effect of the back EMF is still evident.

But in that case, there is not enough energy in the magnetic field to fully discharge the caps as in the 2H case.

I did not use a Darlington in the sim as the 2N3055 is able to fully charge the caps within about 200 ms.

The traces also show that the final Ic is about 0.1 mA which would be Icbo.

Q1 can't be conducting at that point since the base voltage is more negative than the emitter voltage.
 
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Hi again,

ljcox:
I didnt notice that someone said that they used LT Spice and came up with no back emf. That's very surprising, and the only way that can happen is if the inductance is kept below some minimum, given the other load data we have received so far in this thread.

This circuit problem is not too difficult to solve analytically, in fact rather simple really because it's just a second order system with one cap, one inductor, and one resistor. The other diode simply subtracts a small voltage from the initial value of the capacitor.

Solving analytically, we can solve for the inductance that would give us the break over point where the circuit changes from over damped to under damped. The under damped case is the problematic area so we want to know what the maximum value of inductance is before we start to see an under damped response. This inductance is:
Lx=C*R^2/4

Pretty simple huh :)
That's the inductance which if increased just a tiny tiny amount (say 1 uH) would cause an underdamped response and thus a negative voltage across the cap, even if small.

Since we had input data in this thread of R=4 ohms and C=2000uf, we can use that in the equation above and we get:
L=0.008 Henries

So once L goes over 8mH we see an oscillatory response which means undershoot.

But lets also solve for the time when we reach the peak negative voltage when it does go negative:
e^(-(t*R)/(2*L))*sin((t*sqrt(4*C*L-C^2*R^2))/(2*C*L))=0 [eq1]

and the actual voltage across the cap:
Vc(t)=E*(R/(2*w*L)*sin(w*t)+cos(w*t))*e^(-t*R/(2*L)) [eq2]
E is the initial cap voltage minus a diode drop,
w=sqrt(C*(4*L-C*R^2))/(2*C*L)


What we can do then is solve for t in eq1, then use that value of t in eq2 to get the actual peak voltage. To solve eq1 we can use a numerical solver, and a typical inductance value.
Note: it looks like the analytical solution for t in eq1 is:
t=(2*pi*C*L)/sqrt(4*C*L-C^2*R^2) [eq3]
This makes the negative peak voltage:
Vpeak=-E*e^(-(pi*C*R)/sqrt(4*C*L-C^2*R^2)) [eq4]
And since 'e' to the power is always postive, Vpeak is always negative (for
inductances greater than calculated above)

Using L=50mH and E=22v we find the negative peak to be at t=0.03427759 seconds, and at that time the capacitor voltage (using eq2 or eq4) is: -5.58 volts.

With values smaller than 50mH like 20mH, we get less negative voltage, and with values greater than 50mH we get more negative voltage.

All we are doing here is proving that the clamp diode should be included in the circuit permanently. We arent saying the circuit wont work anymore because we know what the load is now so we know how the circuit works exactly.

Just for the record, an inductance value of 20mH produces only -1.692 volts. Not to significant i would say but something to think about. Higher inductance values could cause undershoots of -10v or more. So again, we see the clamp diode should be included.
Inductance values 8mH or less will NOT produce ANY negative voltage, unless of course the actual real life resistance is less than 4 ohms, then we'd have to go back and recalculate the maximum inductance before undershoot.

Quick side note:
Note that eq1 can have more than one solution, so the solution(s) needs to be checked with equation 2 before it can be considered valid. The first peak is the most negative, so the initial guess in a numerical solver should be small like 25ms. Just in case it converges to zero, try a larger guess (or use the analytical solution).
 
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Thanks Mr Al, it's nice to see an independent approach.

I thought about the under, critical & over damped issue, but did not bother to do the maths.

I decided that a simulation would be easier & would also provide the waveforms & final values.

Later, all repeat the simulation using the inductance values you mentioned.
 
The attached show the traces for solenoid inductances: 5 mH, 10 mH & 50 mH.

I made L1 a pure inductance in order to show its back EMF and used R3 to simulate the resistance of the inductance.
 
Hi Len,

The simulations are interesting, but i find that the undershoot with L=5mH is too much on the simulation. The analytic approach shows 5mH to be an overdamped case. Not sure what is wrong there yet, but with 5mH we shouldnt see any undershoot.
As i had posted previously, the critical inductance value is:
L=C*R^2/4
and that works out to 8mH, so anything less than 8mH should not produce any undershoot.

If you'd like to post the .asc file i can try to reproduce your waveforms and see what is different. What i dont see is where the extra energy in the inductor can come from.
Also, if you plot the capacitor voltage with each waveform that will be nice too.
 
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Len,

Is the trace labeled "Back EMF" showing the voltage at node N8 in your simulation circuit?

Node N8 is not accessible in a real inductor because the resistance R3 is distributed over the wire comprising the solenoid winding. The voltage at node N5 would be the real "back EMF" that would be applied to the right end of diode D3 and the base of the transistor.

MrAL, I think this is why an undershoot is shown in the 5 mH case; he's showing "back EMF" as the voltage across L1, whereas the voltage across the real inductor would be the voltage across both R3 and L1. The voltage across only L1 would show undershoot, but the voltage across both R3 and L1 would not.

In the 50 mH case, the undershoot at node N5 would be limited to about 1.4 volts, the sum of the forward drops across D2 and D3, rather than the 4+ volts shown on his plot.
 
Electrician:
Oh yes, good catch. I asked him to show the capacitor voltage next, which is what we are really interested in right? I think the important thing is that the cap voltage doesnt go negative.

Len:
We are not really that interested in the voltage across the 'internal' inductance of the physical inductor. What happens is the series resistance drops a lot of that voltage, and in the overdamped case the resistance must be dropping all of the back emf with low inductance like 5mH.
Note also that we are not that interested in the voltage across the physical inductor either (that's both the inductance and the series resistance). We only have to be concerned about the voltage across the cap.
 
Hi Len,

The simulations are interesting, but i find that the undershoot with L=5mH is too much on the simulation. The analytic approach shows 5mH to be an overdamped case. Not sure what is wrong there yet, but with 5mH we shouldnt see any undershoot.
As i had posted previously, the critical inductance value is:
L=C*R^2/4
and that works out to 8mH, so anything less than 8mH should not produce any undershoot.

If you'd like to post the .asc file i can try to reproduce your waveforms and see what is different. What i dont see is where the extra energy in the inductor can come from.
Also, if you plot the capacitor voltage with each waveform that will be nice too.
Good morning Mr Al,
I can't post the .asc file at the moment as I'm using another computer. Sop I'll do it later.

The capacitor waveform is the N3 waveform which, I think from memory, I labelled "Emitter voltage".

Thanks for your interest.
 
Len,

Is the trace labeled "Back EMF" showing the voltage at node N8 in your simulation circuit? Yes, see below.

Node N8 is not accessible in a real inductor because the resistance R3 is distributed over the wire comprising the solenoid winding. I understand that. The voltage at node N5 would be the real "back EMF" that would be applied to the right end of diode D3 and the base of the transistor. I disagree, see below.

MrAL, I think this is why an undershoot is shown in the 5 mH case; he's showing "back EMF" as the voltage across L1, whereas the voltage across the real inductor would be the voltage across both R3 and L1. The voltage across only L1 would show undershoot, but the voltage across both R3 and L1 would not.

In the 50 mH case, the undershoot at node N5 would be limited to about 1.4 volts, the sum of the forward drops across D2 and D3, rather than the 4+ volts shown on his plot.
Thanks for the response.

The "real back EMF" is the EMF "inside" the inductance, it is the voltage that is driving the current.

What we see across the inductor's terminals is the result of the voltage divider action of the "internal" resistance and the impedance of the external circuit.

I showed the inductance as a pure inductor in order to show the "real back EMF".

If you scan the previous posts, you will see that the topic of dispute was whether a back EMF exists or not.
 
@MrAl thanks so much for outlining it in formulic terms this will allow me to understand the math behind. I don't understand everything about the formulas but at least now I know what to refer to if I come across it

@ljcox thanks for much for the LTSpice diagram and the explanation, it enables me to mapped my understanding to how the current flows and how the different component interact with one another. I will also download the LTSpice app to install in my computer to play around with it to understand about circuits more.

really appreciate other who have take time to provide input and feedback. Really learned a lot from the different discussions that have been going. Specifically I learned more about how the output really matters, about EMF and other things that need to be considered when building a circuit.
 
Hello again,

nick:
You're welcome and i hope you get something out of this thread. You seem to be interested in this kind of circuit so i think you will.

Len:
When i say "back emf" i assume that we are concerned not with the back emf itself but the possible damaging effect it has on the circuit. Thus i was looking for the capacitor voltage not the back emf voltage itself. This would be the emitter voltage in your plots.
I also see that you left in the clamp diode. If you ran the simulation without the clamp diode im sure you would see more reverse cap voltage than with it. The voltage there should be the same or close to the theoretical values given earlier.
If you feel like running the simulation again perhaps you can remove the clamp diode and we'll see how it goes.

As to the general operation of the circuit and reliability...
Although i know now that the solenoids in question are somewhat low inductance, i dont think that it would be very unreasonable to plan for an inductance as high as 50mH or 100mH, or even higher.
 
Hello again,

Len:
When i say "back emf" i assume that we are concerned not with the back emf itself but the possible damaging effect it has on the circuit. Yes, but I was trying to show that it exists, given the claim that it does not exist. Thus i was looking for the capacitor voltage not the back emf voltage itself. This would be the emitter voltage in your plots. Yes
I also see that you left in the clamp diode. Yes, I wanted to show its effect. If you ran the simulation without the clamp diode im sure you would see more reverse cap voltage than with it. Agreed The voltage there should be the same or close to the theoretical values given earlier. I expect so.
If you feel like running the simulation again perhaps you can remove the clamp diode and we'll see how it goes. See below

As to the general operation of the circuit and reliability...
Although i know now that the solenoids in question are somewhat low inductance, i dont think that it would be very unreasonable to plan for an inductance as high as 50mH or 100mH, or even higher.
I want to move on, I've spent enough time on this.

I intend to make one more post after lunch & depart.
 
Nick,
I have simulated 2 situations where an inductance of 1H has a resistance of 10 Ohm in Case 1 & 20 Ohm in Case 2.

Initially a 10 volt step is applied to the inductance.

In both cases the back EMF starts at 10 volt and decays in an exponential manner to zero as the current grows in an exponential manner towards 1 Amp.

Thus the back EMF opposes the growth of current in accordance with Lenz's Law.

In both cases, the time constant is 100 ms. τ = L/R.

Switch S1 opens after 700 ms and the current decays to zero via R2.

Note that the back EMF opposes this decay by attempting to keep the same current flowing, i.e. 1 Amp (again in accordance with Lenz's law).

In case 1, the back EMF has to be -20 Volt initially in order to keep 1 Amp flowing.

In case 2, the back EMF has to be -30 Volt initially in order to keep 1 Amp flowing.

In case 1, the time constant is 50 ms. In case 2, the time constant is 33 ms.
 
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