AND gate design questions

[upand_at_them]

I saw this in an electronics book. I was curious why it has double clamp diodes separated by resistors...If the first one conducts, would the second ever be used? And why the output stage is tripled...If they were in parallel I could understand (higher output current), but in series it seems like a waste?

 

[kubeek]

First part of question is related to SCR latchup. Since the chip is tiny the diodes are tiny as well, so with quite a small current, say 100mA the voltage drop on the diode could be say 1.5V, which would cause the latchup behavior. So the first diode feeds the second one through a resistor to make sure the gate voltage doesn´t exceed VCC by more than a 0,7V.

Second part of the question is related to the speed of the gate and slew rate of the output. The output buffer is used to make transition between level happen faster. Also each stage is probably a little larger than the previous one, so that it can more easily feed the gate capacitance, so that ultimately the last stage can provide some significant output current.

Another reason for faster switching is that when the complimentary pair is switching level, both transistors are on for a brief time, which shorts the power rail to ground. Thus you want the transistion time to be as small as possible, especially in the later stages of the buffer since those transistors will be capable of more current.

 

[ronsimpson]

I agree on the input diodes but not on why the extra inverters (or output stages).

Look at picture 3 at the bottom. I showed how to remove 4 transistors and get the same function.
A transistor pair makes a inverter. Two pair make a buffer. Some times the schematic does not show the "buffer" because it has no logic function. It does have a function of increasing the gain!.
There are two types of parts like this. CD4001ub Unbuffered and D4001b Buffered.
Your circuit is buffered. By removing the 4 transistors you get unbuffered.

The graph on the right is buffered. There are 3 lines for 5V, 10V and 15V supply. Lets look at the 10V supply. The output voltage swings from 0 to 10 volts as the input changes. You can see at 5V on the input the output switches. Below 5=0 and above 5=1. There is a very small area from 5 to 5.2 where the part is not certain if it is a 1 or a 0.

Now look at the left graph. Going from 0 to 1 the part switches at about 7.0 volts. BUT Going from 1 to 0 the part switches at 3.0 volts.
Also because of the lower gain the part has a much wider uncertainty area. Going from 0 to 1 at Vin=2.5V the output is not at one of the supplies but is about 2 volts off from the supply. (This part could leave its output at 2V or 1V or something not 0V. )

There is a place to use UB and a place to use B.

 

[upand_at_them]

Thanks for the education on the buffers.

But why would voltage drop be 1.5V across the first diode instead of 0.7V?

 

[ronsimpson]

Okay, but why would voltage drop be 1.5V across the first diode instead of 0.7V?

At reasonable (low) current the voltage is 0.7V. At 10X that current the voltage might be 1.0V and 10X gain the voltage is 1.3V and 10x again 1.6V.
I just made up the numbers but I can get you the exact numbers but this is good enough for now.

 

[MikeMl]

Ahh, yes, the mythical 0.7V. Look at this...

 

[upand_at_them]

Ohhhh...It's not a fixed voltage drop. Interesting that the drop increases as the current increases. I would have thought Vdrop would have decreased as current increased, because more electrons are available. Perhaps the electrons are getting crowded.

Thanks, guys. Now I shall go read up on SCR lockup.