hi,
Would you please post the remainder of the code.?
Lets see the snippets in context.
Abnormal behaviour PIC18 Simulator IDE v2.81
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14th April 2012 08:13 PM #1robertkendrick
Abnormal behaviour PIC18 Simulator IDE v2.81
Hi
Try this simple code using FSR1 with andwf and iorwf instructions.
label one works. label two and three fail.
Wondering if anyone has had similar problems and knows of a fix.
Code :; 18F4520 ; abnormal behaviour in PIC18 Simulator IDE org 0 goto 0x100 org 0x100 one: ; works as defined movlb 0 setf FSR1H movlw 0x93 movwf FSR1L movlw 0xee movwf preinc1 two: ;this code snippet does not alter ;TRISC and corrupts TRISD. Also ;FSR1 is incremented twice. movlw 0x93 movwf FSR1L movlw 0x7f andwf preinc1,f three: ;this code snippet does not alter ;TRISC and corrupts TRISD. Also ;FSR1 is incremented twice. movlw 0x93 movwf FSR1L movlw 0x0f iorwf preinc1,f end
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15th April 2012 12:45 PM #2ericgibbs
Super Moderator0Eric " Good enough is Perfect "
I will NOT answer PM's requesting technical help, please use the Forum
"Nigels Asm tutorials:" www.winpicprog.co.uk/
"Ian Rogers 'C' conversion of Nigels Asm tutorials:" http://www.electro-tech-online.com/c...torials-c.html
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15th April 2012 01:09 PM #3Ian Rogers
Super Moderator
Eric... I very much think that it.... "org" at the beginning and "end" at well... the end..
0I'd give my left arm to be ambidextrous
Nigel's tutorials in asm... http://www.winpicprog.co.uk/
Nigel's tutorials.. re-written in C. http://www.electro-tech-online.com/c...torials-c.html
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16th April 2012 10:19 PM Thread Starter #4robertkendrick
Eric, thanks for the reply.
I don't have any code I would like you to fix (not today anyway ..)
The posted code illustrates a pretty serious bug in Pic18 Simulator.
Place these five instructions into the Assembler and 'assemble & load'
Then single step them.
TRISC (0x0f94) should be updated by the IORWF instruction but isn't.
TRISD (0x0f95) is corrupted.
FSR1 is incremented twice instead of once.
;This does not alter
;TRISC and corrupts TRISD. Also
;FSR1 is incremented twice.
setf FSR1H
movlw 0x93
movwf FSR1L
movlw 0x0f
iorwf preinc1,f
Do the same assembly and single step in MPLAB (8.70) and it works as expected and documented in the data sheet.
Further tests within PIC18 sim also show that this bug applies to all IORWF/ANDWF instructions whilst using PREINCx with any FSR.0
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