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Timer1 interrupt is hit but IRQHandler not executed

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  1. #1
    javeed.shariff
    javeed.shariff is offline

    Default Timer1 interrupt is hit but IRQHandler not executed

    Hi,

    I've written a sample code for LPC2378 (simulation mode using keil) to generate timer1 interrupt in IRQ mode.

    Upon T1MR0 match, timer1 is generating interrupt but the IRQHandler is not invoked instead the control is transfer to else where in the program.

    I've place a break point but no luck in IRQHandler.

    Please help me in resolving this issue:

    void InitTimer1() {
    /* Timer1 and Preset disabled */
    T1TCR = 0x00;
    /* Timer Counter register, after PR is reset, this inc by 1 */
    T1TC = 0x00;
    /* Prescalar register! Max value for prescalar counter */
    T1PR = 0xFFFF;
    /* Prescale Counter register */
    T1PC = 0x0;
    /* End user has to fill in the match value */
    T1MR0 = 0x222;
    /* Reset TC and interrupt on match */
    T1MCR = 0x03; /* 0000 0000 0000 0011 */
    }

    void enable_IRQ(void)
    { int tmp;
    __asm
    {
    MRS tmp, CPSR
    BIC tmp, tmp, #0x80
    MSR CPSR_c, tmp
    }
    }

    void InitVIC() {

    VICIntSelect &= ~(1L<<5); /* Timer 1 selected as IRQ */
    VICVectAddr5 = (unsigned long )IRQHandler;
    VICVectPriority5 = 0x05;
    VICIntEnable |= 0x20; /* Timer 1: (bit 5) interrupt enabled */

    }

    __irq void IRQHandler(void)
    {
    unsigned static int i = 0;

    T1IR = 0x01; /* Clear Timer1 MR0 interrupt */

    IOSET0 = ~ (1 << (i+1));
    if ( i == 32)
    i = 1;
    i++;

    VICVectAddr = 0x00000000; /* Dummy write to ACK the VIC */

    }

    int main() {
    InitPLL();
    EnableMAM();
    SetPeripheralClock();
    InitGPIO();

    enable_IRQ();
    InitTimer1();
    InitVIC();

    /* Timer1 and Preset Enabled */
    T1TCR = 0x01;

    /* Rest of the code */
    while (1);

    }

    The startup.s file has the following:

    Vectors LDR PC, Reset_Addr
    LDR PC, Undef_Addr
    LDR PC, SWI_Addr
    LDR PC, PAbt_Addr
    LDR PC, DAbt_Addr
    NOP ; Reserved Vector
    ; LDR PC, IRQ_Addr
    LDR PC, [PC, #-0x0120] ; Vector from VicVectAddr
    LDR PC, FIQ_Addr

  2. #2
    javeed.shariff
    javeed.shariff is offline
    Hi,

    Has anyone done this before?

    Regards,
    Javeed

  3. #3
    Mr RB
    Mr RB is offline
    Are you sure this line is right?
    T1IR = 0x01; /* Clear Timer1 MR0 interrupt */

    But that's just a blind guess.
    Roman Black - PICs and electronics. Author of BTc PIC-sound encoder, Shift1-LCD project, the TalkBotBrain talking PIC controller, LiniStepper open-source microstepping motor driver, the Black Regulator 2-transistor SMPS, and probably some other stuff; www.RomanBlack.com

  4. #4
    javeed.shariff
    javeed.shariff is offline
    Yes it is correct.

    Please find below the bit map for T1IR register:
    T1IR: 4bits for MRn and 4bit for CRn
    0 - MR0 int, 1 - MR1 int, 2 - MR2 int, 3 - MR3 int
    4 - CR0 int, 5 - CR1 int, 6 - MR3 int, 7 - CR3 int

  5. #5
    Mr RB
    Mr RB is offline
    So you CLEAR the MR0 interrupt flag by setting it to 1?
    Roman Black - PICs and electronics. Author of BTc PIC-sound encoder, Shift1-LCD project, the TalkBotBrain talking PIC controller, LiniStepper open-source microstepping motor driver, the Black Regulator 2-transistor SMPS, and probably some other stuff; www.RomanBlack.com

  6. #6
    javeed.shariff
    javeed.shariff is offline
    Yes it is cleared by setting 1.

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