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Old 28th October 2009, 04:19 PM   #1
Default Interrupts in Microprocessor IC-8085.....

In IC 8085 there is a command RIM which is supposed to show u if any RST 7.5,6.5 or 5.5 interrupt is pending....Now what does "pending" interrupt mean???If the interrupts are disabled (either by masking or disabling the Interrupt Enable F/F) then the interrupts wont wrk at all....n if they r enabled,then as soon as the microprocessor is interrupted it will cease all current wrk n go respond to the interrupt....So either the interrupts are disabled or the microprocessor responds to them immediately....Where does this "pending" thing come into the picture????
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Old 28th October 2009, 04:45 PM   #2
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Originally Posted by Rohit Chatterjee View Post
In IC 8085 there is a command RIM which is supposed to show u if any RST 7.5,6.5 or 5.5 interrupt is pending....Now what does "pending" interrupt mean???If the interrupts are disabled (either by masking or disabling the Interrupt Enable F/F) then the interrupts wont wrk at all....n if they r enabled,then as soon as the microprocessor is interrupted it will cease all current wrk n go respond to the interrupt....So either the interrupts are disabled or the microprocessor responds to them immediately....Where does this "pending" thing come into the picture????
hi,
Its all out there on Google;

Look at this explanation.
Interrupt Predictability
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Last edited by ericgibbs; 28th October 2009 at 04:45 PM.
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Old 28th October 2009, 05:20 PM   #3
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Thnx but the explanation went a few inches over my head....i mean its a bit hi-fi
.....anyone wth a simpler xplanation????
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Old 28th October 2009, 06:08 PM   #4
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Thnx but the explanation went a few inches over my head....i mean its a bit hi-fi
.....anyone wth a simpler xplanation????
hi Rohit,
May I ask what subject you are studying and what year level you are currently at.?

This would help us to tailor our replies to suit your background knowledge,
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Old 28th October 2009, 06:42 PM   #5
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M studyin electronics n telecomm engg....into my 3rd yr (5th semester)...n we hav this paper on IC-8085.....actually its on microprocessors wth 8085 as the case study....
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Old 28th October 2009, 06:45 PM   #6
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Originally Posted by Rohit Chatterjee View Post
In IC 8085 there is a command RIM which is supposed to show u if any RST 7.5,6.5 or 5.5 interrupt is pending....Now what does "pending" interrupt mean???If the interrupts are disabled (either by masking or disabling the Interrupt Enable F/F) then the interrupts wont wrk at all....n if they r enabled,then as soon as the microprocessor is interrupted it will cease all current wrk n go respond to the interrupt....So either the interrupts are disabled or the microprocessor responds to them immediately....Where does this "pending" thing come into the picture????
Pending is what happens when the conditions for generating an interrupt are present. An interrupt can remain pending for a variety of reasons including:
  1. The processor is currently processing a higher priority interrupt.
  2. The interrupt of interest is currently masked.
  3. Interrupts are disabled.
You want the interrupt to remain "pending" until the processor can free itself from its other tasks and process the interrupt. That's what "pending" is all about.
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Last edited by Papabravo; 28th October 2009 at 06:45 PM.
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Old 28th October 2009, 06:51 PM   #7
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Originally Posted by Rohit Chatterjee View Post
M studyin electronics n telecomm engg....into my 3rd yr (5th semester)...n we hav this paper on IC-8085.....actually its on microprocessors wth 8085 as the case study....
Consider the word 'pending', it means the next action in a queue.

So if only one Interrupt is requested the programme will service the requested interrupt and then resume the next program instruction in the original sequence before the interrupt occurred.

If a second interrupt occurs while the mcu is servicing the first interrupt then the mcu 'notes' the interrupt but completes its current interrupt service, when done it will action the 'pending' interrupt, complete that, then return to the original program.
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Last edited by ericgibbs; 28th October 2009 at 06:53 PM.
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Old 28th October 2009, 07:28 PM   #8
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Originally Posted by Papabravo View Post
Pending is what happens when the conditions for generating an interrupt are present. An interrupt can remain pending for a variety of reasons including:
  1. The processor is currently processing a higher priority interrupt.
  2. The interrupt of interest is currently masked.
  3. Interrupts are disabled.
You want the interrupt to remain "pending" until the processor can free itself from its other tasks and process the interrupt. That's what "pending" is all about.
If the interrupt is masked or disabled would it still be considered pending???
Will the interrupt signals even reach the concerned portion of the microprocesor???I hav this book on IC-8805 n the diagram ovr there shows that the interrupt signal has to pass through an AND gate....and the AND gate is disabled if either the interrupt is masked or the interrupts r disabled in general....
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Old 28th October 2009, 07:32 PM   #9
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Originally Posted by ericgibbs View Post
If a second interrupt occurs while the mcu is servicing the first interrupt then the mcu 'notes' the interrupt but completes its current interrupt service, when done it will action the 'pending' interrupt, complete that, then return to the original program.
When an interrupt service subroutine is written the enable interrupt instruction is usually written at the end of the code...before the return statemnt....so evn if an interrupt occurs the interrupts would be disabled....and if the interrupts hav not been disabled then the microprocessor will suspend performing the current interrupt routine n respond to the interrupt....so the 2nd interrupt wouldnt remain "pending" at all.....Right???
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Old 29th October 2009, 02:53 PM   #10
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No. Interrupts can always remain pending as long as the peripheral device requires service. It does not matter what the processor is doing. When the processor gets around to enabling interrupts all those pending interrupts will be ready to go and the highest priority pending interrupt is the one that will be next in line for service.

The crucial point is that a peripheral device is responsible for maintining the interrupt in a pending status until it is serviced by the processor. This is one reason why level sensitive interrupts are preferred by some designers and programmers.
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Old 29th October 2009, 06:40 PM   #11
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Well that explained a lot....thnx so so so much....
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