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Old 26th May 2009, 08:32 PM   #16
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Quote:
I press the button but it's garbled
If you hook the top two left pins on a 7 segment wrong you'll get a garbled display I done that a time or to
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Old 26th May 2009, 08:41 PM   #17
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Hi,

I just figured why it's garbled. It's because I connected Qa from shift register to seg_a, Qb to seg_b etc. Needs to be the other way around Qa to seg_g etc., I think. Will play a bit more.

Won't post my code unless I get totally stuck. And I'm definately a beginner compared to most of you guys. I admire you experienced guys, your posts make great reading / learning material.
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Old 26th May 2009, 08:43 PM   #18
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i like that attitude. If you ever get stuck badly just ask away.
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Old 26th May 2009, 08:46 PM   #19
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74hc373 Is Octal D-type transparent latch; 3-state you feeding it with the 74hc164 right. That the one that gets you every time.
Quote:
to seg_g

Last edited by be80be; 26th May 2009 at 08:49 PM.
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Old 27th May 2009, 04:56 AM   #20
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I don't see why you "need" to use the latch? I use 595's because I bought hundreds as surplus, but I never use the latch for driving displays. Just clock the data in, that takes a couple microseconds then hold the data for the multiplex period. You wont see any flickering from the couple uS clocking the data in!

You only need 2 PIC pins, for data/clk.
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Old 27th May 2009, 01:03 PM   #21
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I also don't think you need an additional latch IC but I would still blank the display while loading the shift register.

Angry Badger, you should be able to change the software "segment table" to match the way you wired the segments, or easier still, shift out the serial bits in the reverse order.

Mike

Last edited by Mike, K8LH; 29th May 2009 at 10:38 AM.
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Old 27th May 2009, 01:07 PM   #22
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A latch is needed if he wants to show a number/alpha on the 7 seg without seeing it being shifted in

I rather have a number popup then see it slide in as jumbled stuff.

Last edited by AtomSoft; 27th May 2009 at 01:07 PM.
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Old 27th May 2009, 01:12 PM   #23
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No, it's not necessary. The data you shift in stays on the outputs so all you need to do is;

(1) turn off the old digit common cathode or common anode transistor (blank the display).

(2) load new digit 8 bit segment data into the shift register.

(3) turn on the new digit common cathode or common anode transistor.

Duh!

Last edited by Mike, K8LH; 27th May 2009 at 01:12 PM.
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Old 27th May 2009, 01:15 PM   #24
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That is 1 one he can do it.

But he can also just use the latch. They both will accomplish the same thing. and require one pin extra.

The point is he has many options.
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Old 27th May 2009, 01:24 PM   #25
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Agreed! There are an almost unlimited number of ways to do it.

Do you know how to do it with 3 pins total using a 74HC595 and two transistors for his 2 digit display?

Last edited by Mike, K8LH; 27th May 2009 at 01:25 PM.
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Old 27th May 2009, 02:17 PM   #26
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i did a schematic on page 1 i think lol
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Old 27th May 2009, 02:18 PM   #27
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would it require 1 npn and 1 pnp?
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Old 27th May 2009, 03:20 PM   #28
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Hi,

I've done away with the latch - I just turn the digit off whilst loading the data.

Code:
;PART OF CODE:	
Main:
    movlw   .7                  ;serial data has to be shifted seven times
    movwf   shift_count     
    movfw   units               ;zero at start-up, incremented later by button
    call    Binaryto7seg        ;get led segment data corresponding to value of 'units'
    movwf   LED1
Shift_bits:
    rrf     LED1
;determine state of data bit  
    btfsc   STATUS,C        ;is the data bit '1'?
    bsf     PORTC,0         ;yes, copy the data bit to the port bit
;data clk        
    bsf     PORTC,1         ;clk pulse low to high shifts data bit into Q0 74HC164
    bcf     PORTC,1         ;clk pulse low
    bcf     PORTC,0         ;set it to '0' if it had been set to '1'
    decfsz  shift_count
    goto    Shift_bits
;turn the digits on/off
    call    Display
;test the switch input    
    btfsc   PORTA,0                 ;is RA0 low (switch pressed)?
    goto    Main                    ;no
;count up    
    incf    units                   ;yes
    movlw   .10
    subwf   units,w
    btfsc   STATUS,Z
    clrf    units
;test the switch input    
    btfsc   PORTA,0                 ;is RA0 high (switch released)?
    goto    Main                    ;yes
    call    Display                 ;no
    goto    $-3                     ;loop until switch released     
 
    goto    Main                    ;no
    
;__________________________________________________________________________________________________________	
   
Display:
;Digit_on_time:
    bsf     PORTC,7         ;Drive the mosfet to show the digit   
    clrf    TMR2
    btfss   T2_done
    goto    $-1
    bcf     T2_done  
;Digit_off_time:    
    bcf     PORTC,7
    clrf    TMR2
    btfss   T2_done
    goto    $-1
    bcf     T2_done
             
    return
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Old 28th May 2009, 06:50 PM   #29
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Quote:
Originally Posted by AtomSoft View Post
would it require 1 npn and 1 pnp?
No, I'll draw a sketch and attach it in a little while. It's really simple.

Here's the sketch...



When we're displaying digit 1 or digit 2 the RB2 pin is low which enables the '595 outputs and the RB0 and RB1 pins are setup to enable one of the column driver transistors.

When we're updating or refreshing the display we set the RB2 pin high which disables the '595 outputs and blanks the display. This also takes the RCK (latch) pin high so data clocked into the shift register goes immediately onto the output latches but this doesn't matter because the outputs are turned off so we won't see anything funny on our display. Now we retask our RB0 ad RB1 pins for use as SER (DAT) and SCK (CLK) lines to load the '595 shift register. While we're using RB0 and RB1 to load the shift register we're also inadvertently turning the column driver transistors on and off but this doesn't cause a problem because, again, the '595 segment driver outputs are off (the display is off).

Here's an untested ISR driver example;

Code:
;
;  three pin two digit display
;
;  unsigned char digit1 = 0;    // 0..9
;  unsigned char digit2 = 0;    // 0..9
;  unsigned char column = 1;    // 00000001 or 00000010
;
;  #define DAT portb.0          // DAT and digit 1 select pin
;  #define CLK portb.1          // CLK and digit 2 select pin
;  #define LAT portb.2          // shift register LAT & OE pins
;
;  void isr_display()
;  { unsigned char work;        //
;    unsigned char i;           //
;    pir1.TMR2IF = 0            // clear timer 2 interrupt flag
;    if(column.0 == 0)          // if last digit was digit 2
;      work = segtbl[digit1];   // get segment data for digit 1
;    else                       // else
;      work = segtbl[digit2];   // get segment data for digit 2
;    LAT = 1;                   // LAT/OE = 1, blank the display
;    for(i = 0; i < 8; i++)     // load the shift register
;    { CLK = 0; DAT = 0;        //
;      if(work.0) DAT = 1;      //
;      CLK = 1;                 // clock bit into SR
;      work >>= 1;              //
;    }                          //
;    column ^= 0b00000011;      // flip digit select bits
;    portb = portb & 0xF8 | column;  // turn on display
;  }                            //
;
There are a few subtleties to the code. It's important to leave the SCK (CLK) pin high after loading the shift register so that when we set RB0 and RB1 to enable the column drivers we'll never get a low-to-high transition on the SCK pin and clock in an unwanted bit. Also, we set the RCK and EN pins back to '0' to turn on the display in that very last instruction when we AND port B with 0xF8.

Anyway, sorry to detract from the original posters thread.

Regards, Mike
Attached Thumbnails
Serial Data Out from 16f690 to 74HC164-brain-teaser.png  

Last edited by Mike, K8LH; 28th May 2009 at 08:17 PM.
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Old 28th May 2009, 07:44 PM   #30
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I think i get it lol

So you send data as normal when latch isnt on then latch it and set either the RB1 and RB0 depending on digit. then repeat by sending the appropriate data then latching?

EDIT:
I must ask sorry to go off topic but what program are you doing that nice drawing in?

Last edited by AtomSoft; 28th May 2009 at 07:45 PM.
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