3v0

Thanks for the tips. So you're suggesting not to let the clock run continuously but to just manually clock 3 pins (via GPIO, I guess?)?

What do you mean by "Stop thinking of these signals as free running clocks."? I thought the CLK pin connected to my SPI module will run continuously while the processor is running.

If this is the case, wouldn't it make sense to devise a careful way to clock the latch (within the timings of the 8th, 16th, so on serial register clocks)?

Originally Posted by 3v0

I have C code for such an engine setup to work on 2 cascaded 595's / 16 LEDs. If you want it all you have to do is ask.

Could I?

Thank you!

Originally Posted by krazy

3v0

Thanks for the tips. So you're suggesting not to let the clock run continuously but to just manually clock 3 pins (via GPIO, I guess?)?

What do you mean by "Stop thinking of these signals as free running clocks."? I thought the CLK pin connected to my SPI module will run continuously while the processor is running.

No, and it would be a complete disaster if it did - as he said "Stop thinking of these signals as free running clocks."

You send out a clock pulse for each bit you want to clock in or out, and at no other time.

Originally Posted by krazy

3v0

thanks for the tips. So you're suggesting not to let the clock run continuously but to just manually clock 3 pins (via gpio, i guess?)?
yes
data, clock, and latch


what do you mean by "stop thinking of these signals as free running clocks."? I thought the clk pin connected to my spi module will run continuously while the processor is running.

i use gpio pins and set them as needed. KISS. It is easy to understand and troubleshoot. A free running clock would shift data in every cycle even when you have no valid data. This is not a problem execpt you have to time the latch operaton so that it falls between the last valid data bit and the first meaningless one. You need to shift out 8*(number of 595 cascaded) then latch. I think that may be tricky with spi hardware, if possible. It is very easy in software.

if this is the case, wouldn't it make sense to devise a careful way to clock the latch (within the timings of the 8th, 16th, so on serial register clocks)?

Covered this above.

Could i?

Thank you!

My first choice is to advoid dedicated hardware. Software drivers can be used on any pin and tweaked if needed.

Once you understand how to drive a device with software you can use it on most any processor.

There are times when you can and should use the hardware but I do not see this as one of them.

The latest copy of the software is at school. Give me 24 hours to look it over and do a bit of documentation.

3v0