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Originally Posted by BOBKA Nigel: Using voltage divider will introduce resistance to the system, and thus the system might behave in a wrong way.
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Why?, you don't seem to understand what one is?, a correctly designed one causes no problems whatsoever - and they are simple to design.
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I will probably make a sample-and-hold block, then do the voltage divider at it's output and sample this output using pic's adc. Or I might just create a source follower, then voltage divide it and then sample this voltage using pic's adc. |
No point whatsoever adding an external sample and hold, as it already has an internal one. Why voltage divide AFTER a buffer?, it pretty well negates the point of the buffer, and of the potential divider - check my tutorial hardware, use the buffer between the potential divider and the PIC.
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In my case I just want to avoid introducing additional resistors (such as voltage dividers) to the ckt.
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Unless your input is 0-5V? (of at least 0-Vref) then there's absolutely no point, and no real alternative!.