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Old 5th November 2009, 09:58 PM   #1
Default Is this p-channel mosfet working backwards?

Please reference page 9, figure 2 of the following data sheet:

http://cds.linear.com/docs/Datasheet/4412fa.pdf

Why do they have the P-channel FETs hooked up with the source towards the load? How are these devices working? I am more used to seeing things like Figure 7 for high-side P-channel power switches.

Thanks for any help!
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Old 5th November 2009, 10:27 PM   #2
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It's not working backwards. Current flows from Drain to Source. Since it's a p-channel MOSFET, VDG > -VT, and the MOS is in the low power dissapation region. The Sense pin of the IC keeps the FET in that region.
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Last edited by BrownOut; 5th November 2009 at 11:25 PM.
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Old 5th November 2009, 10:31 PM   #3
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Then how does figure 4 work?
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Old 5th November 2009, 10:40 PM   #4
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Those MOSFET's ARE working backwards LOL! MOSFET's are allowed to work that way, so it's OK.
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Old 5th November 2009, 10:42 PM   #5
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Really? Is this because the Vds is essentially zero in these cases?
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Old 5th November 2009, 11:18 PM   #6
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VDS is nearly zero, but that's because in a P-channel MOSFET, when VGS< VT and VDG > -VT, a strong inversion layer is formed between the drain and source, which is bidirectional.

EDIT: I edited all my conditions for low power dissapation. I get those confused easily.
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Last edited by BrownOut; 5th November 2009 at 11:25 PM.
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Old 6th November 2009, 01:26 AM   #7
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The reason the source and drain is connected backward from what you might expect is so the parasitic MOSFET diode (which is connected anode to drain and cathode to source) does not conduct if the wall adapter voltage is significantly higher than the battery voltage, which would perform uncontrolled charging of the battery.
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