What does the following circuit produce at AVCC? I know absolutely nothing about inductors at the moment, so i have no idea

AVCC is connected to AVCC pin on an Atmega16.




Thanks

theoretically there is no energy loss and so assuming zero state when you turn on you will get a sinosoidal wave of peak amplitude 2*Vc after Π/ω across the capacitor.

ω=√1/LC

As there is actually a resistance in real life but its small. After turn on you will get a decaying sinosoid until you just have Vcc across capacitor.

Assuming Vcc is a DC voltage and connection to AVCC is infinite resitance

It is a low-pass power-supply filter intended to keep any spikes that might be on Vcc from appearing on the Atmega's VCC pin. The series inductor presents a high impedance by resisting a sudden change in current flow through it. The shunt capacitor resists any sudden change in voltage at AVCC.

And after simulating it, it is a piss-poor filter, because the damping is way too low. Look at the attached plots. I compare two "improved" versions to the original. Note that the vertical scale of the AVCCn plots are not the same.

AVCC2 looks the cleanest, but requires a large inductor. AVCC3 is not bad, but degrades the voltage regulation. AVCC1 (the original) is horrible!

Originally Posted by MikeMl

It is a low-pass power-supply filter intended to keep any spikes that might be on Vcc from appearing on the Atmega's VCC pin. The series inductor presents a high impedance by resisting a sudden change in current flow through it. The shunt capacitor resists any sudden change in voltage at AVCC.

And after simulating it, it is a piss-poor filter, because the damping is way too low. Look at the attached plots. I compare two "improved" versions to the original. Note that the vertical scale of the AVCCn plots are not the same.

AVCC2 looks the cleanest, but requires a large inductor. AVCC3 is not bad, but degrades the voltage regulation. AVCC1 (the original) is horrible!

Thank you for the response! But what exactly am I looking at on those graphs?

edit:

i understand that R1, R2, and R3 simulate a load, and V1 is a poor voltage source, but i still do not understand what the graphs of avcc1, avcc2, and avcc3 say about the filter.

Originally Posted by Marks256

...
i understand that R1, R2, and R3 simulate a load, and V1 is a poor voltage source, but i still do not understand what the graphs of avcc1, avcc2, and avcc3 say about the filter.

The goal is to provide "pure" DC to AVDD. For example, suppose your Atmega chip has an AnalogDigitlalConverter inside it. Chances are that AVDD could be used as the reference for the ADC, meaning that any noise on it will contaminate the AD conversion, or possibly perturb internal registers and clocks. The less that AVDD changes due to external noise; the better. So the peak-to-peak voltage variation of AVDD is a quantitative means of comparing different methods of filtering the voltage applied to the AVDD pin.

asc file is attached.

Originally Posted by MikeMl

The goal is to provide "pure" DC to AVDD. For example, suppose your Atmega chip has an AnalogDigitlalConverter inside it. Chances are that AVDD could be used as the reference for the ADC, meaning that any noise on it will contaminate the AD conversion, or possibly perturb internal registers and clocks. The less that AVDD changes due to external noise; the better. So the peak-to-peak voltage variation of AVDD is a quantitative means of comparing different methods of filtering the voltage applied to the AVDD pin.

asc file is attached.

Ok so the inductor/capacitor setup is just ensuring that AVDD is stable/clean. I see now. Once i get a few other things to learn off my plate, i'll take a deeper look into inductors. Thanks mike

This is a choke input filter.

The purpose of the (choke) inductor is to provide a stable current. This opposes any instability from VCC. If VCC is stable DC then AVCCInd will build up a magnetic field and let the DC pass. When there is a drop in current from VCC, the inductor discharges current from its magnetic field to keep the current at AVCC more stable.

The capacitor will oppose changes in voltage. If VCC were stable DC, then AVCC.c would charge to maximum capacity and then act as an open, allowing all the stable DC to flow to AVCC. If there is a drop in voltage at VCC, then the capacitor discharges its built up voltage into AVCC.

The inductor and capacitor work together to stabilize AVCC. Generally, the larger the values of the capacitor and incuctor are, the higher their maximum charge capacities will be, and AVCC will be more stable. If VCC is somewhat stable, and changes in current or voltage are brief and small, then lower values for the cap and inductor would be sufficient. If VCC is constantly pulsing at 60 hz or 120 hz, and changes in voltage and current are high (like after rectification of AC), then larger values for the inductor and capacitor would give better stability.