I am trying to build a clock divide by two circuit using a 74HC74 D-type Flip-Flop.

The circuit is correct, I used it with a 32 MHz clock previously.

I am trying to divide a 40 MHz clock by two. From reading the datasheet, the maximum frequency that the 74HC74 will operate on is 30MHz reliably. Is there an alternative or another way to do this? (that is without getting a 20 MHz clock)

Checking the output with my scope, I am not getting 20 MHz (usually 13.4...MHz or some other frequency)

 

The VHC logic family will operate at your frequency.
http://www.fairchildsemi.com/ds/74/74VHC74.pdf

 

just looking at the 74ACT74 datasheet, it will do 140 MHz. That should be enough.

Thanks

 

The datasheet I read had the 'typical' maximum frequency of the clock frequency as 69MHz at 5v. Then again..how you can have a 'typical maximum' fruency I don't know. And another datasheet has the 74HC (I'm ignoring the HCT types) as 50Mhz. But the minimum 'max freq' is way down to 15Mhz, bizare...

I'm quite surprised that the HC doesn't cope with 40Mhz. Whats the source of this clock? its duty cycle ? If the pulse width doesn't meet the specs in the 74's datasheet, it might not be getting every clock.

Failing that, there are other families you could try.
7400 series - Wikipedia, the free encyclopedia

AC/ACT families are quite quick, and the 74ABT74 has a typical max frequency of 250Mhz(!).

Good luck,

Blueteeth

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