How can we properly define active high and low.
Is it just inputs that are active high and low
or a gate or a complete circuit can also be called as active high or active low.

If just first statement is true than it is simple.we can say that the input which gives high output when the input is low is called active low input and that one which gives high output at high input is called active high.
But if the 2nd statement is true as i've heard than it becomes complicated (for me).

As i've heard that NAND is active low gate and NOR is active high gate.How can we certainly say this.cuz if it is so how can we justify the 0 0 combination in truth table cuz both gates give high output when both inputs are low.

And also if a cicuit can be active high and low what will an active high flip flop with two asynchoronous inputs be called.(active high or low)

 

Simple gate functions always follow a specific true table. The inputs and output "active states" has more to do with the application of the gate in the circuit.

Example;

A simple 74X00 NAND gate can to used as both an "AND type" function (2 high inputs = low out) or as a "OR type" function (either or both input low = high out), same gate, same truth table, just two different applications.

It helps if the designer of a logic circuit uses the convection of using signal names that have a bar over the top for active low state or no bar for a active high state. Again this has nothing to do with the chip's stated logic function but rather how it's being utilized in a specific circuit.

The whole concept of positive and negitive logic can be confusing to some but sticking to the device truth tables should generally help one figure it out in spite of the jargon used.

Lefty

 

Will you be more specific please.I think you want to say that a gate or a circuit cannot be completely said Active high or low

 

"Will you be more specific please.I think you want to say that a gate or a circuit cannot be completely said Active high or low"

Humm.... A simple logic gate in abstract cannot be stated as utilizing active high or active low levels without knowledge of the circuit it will be utilized in. The designer has the option of how he/she utilizes the gate by utilizing negative or positive logic.

From http://en.wikipedia.org/wiki/Logic_gate :

"Symbolically, a NAND gate can also be shown using the OR shape with bubbles on its inputs, and a NOR gate can be shown as an AND gate with bubbles on its inputs. This reflects the equivalency due to De Morgans law, but it also allows a diagram to be read more easily, or a circuit to be mapped onto available physical gates in packages easily, since any circuit node that has bubbles at both ends can be replaced by a simple bubble-less connection and a suitable change of gate. If the NAND is drawn as OR with input bubbles, and a NOR as AND with input bubbles, this gate substitution occurs automatically in the diagram (effectively, bubbles "cancel"). This is commonly seen in real logic diagrams - thus the reader must not get into the habit of associating the shapes exclusively as OR or AND shapes, but also take into account the bubbles at both inputs and outputs in order to determine the "true" logic function indicated"


Lefty

 

In my view, only signals can be active high or active low. Each gate has a dual which is given by it's DeMorgan equivalent. I always like to say the function of a gate in words. For Example

A 74HC32 is a quad 2-input OR-gate. In words "A high .OR. a high is a high". The DeMorgan equivalent dual is "A low .AND. a low is a low". Get the picture?

Another example? A 74HC00 is a quad 2-input NAND gate. In words: "a high .AND. a high is a low". So what is the DeMorgan dual? "A low .OR. a low is a high". This gets pretty straightforward after a while.