I hate to rain on some peoples' parades, but here are the results of integrating a triangle. The "sine" wave still has a lot of harmonics, because the integrator is just single pole lowpass filter with the pole (ideally) at zero frequency. Still, it looks pretty good, at least visually.
EDIT: Oops, forgot to post the time domain waveforms! It will be done shortly.
EDIT: OK, they've been added. I changed the cap from 1uF to 0.25uF to get the peak to peak amplitudes approximately the same, so the FFT scaling of the sine wave will be different, but the relative harmonic content will be the same.
EDIT: Note that a simple RC integrator, with the pole (corner frequency) a couple of octaves past the fundamental, also makes a good-looking sine wave. It is severely attenuated, though, compared to the operational integrator, which has adjustable gain (just vary the R or C). Note that, in the real world, you need a big (value) resistor across the cap to keep the op amp from going to one of the rails, and a cap in series with the resistor is also useful, and generally OK for this application.
I still think a simple series resistor and an LC tank is the way to go.

Greetings all,

I know this thread is old, but I believe I'm on topic:
(MOD/OP: if this reply should be on another thread, please advise)

I'm using the VCO (Voltage Controlled Oscillator) of On Semi's MC74HC4046A (CMOS(Complementary metal–oxide–semiconductor) 4046) PLL (Phase-Locked Loop) as an AFSK (Audio Frequency Shift Keying) modulator to communicate over low power (maximized unlicensed radiated power according to FCC (Federal Communications Commission)) FM (Frequency Modulation) radio w/ carrier frequency centered at 107.9MHz. The input to the AFSK modulator is a TTL(Transistor-to-Transistor Logic)-level signal (5V HI, 0V LO)

Currently, the AFSK-mod outputs a square wave and I'd like to convert it to a sine wave to minimize it's occupied bandwidth. I currently have a MARK (logic one) frequency of 2kHz and SPACE (logic zero) freq. of 1kHz (though I intend to double each proportionately to MARK=4kHz and SPACE=2kHz ... perhaps even higher if a greater element length (minimum duration of a MARK/SPACE condition in seconds) is required).

I simulated in PSPICE the idea from Rott with an LC tank of 120uF and 47uH (f_r=2.119kHz) for MARK with a 10ohm series resistor between the tank and the Square wave. It takes about 3ms to ramp up the amplitude to a relatively stable 2Vpk (square wave simulates incoming TTL-level 5V HI, 0V LO). Upon switching the square wave from 2kHz(MARK) to 1kHz(SPACE) and leaving the conversion circuitry the same, it outputs what looks like BPSK(Binary Phase shift keying) modulation of approx 160mVpk. When the Square wave is high, one sine wave occurs, and when Square is low, a sine wave mirrored over the horizontal axis occurs (shifted by 180degrees or pi radians). I changed the tank to 560uF and 47uH (f_res=981Hz) and the output's amplitude ramps up to a about 1Vpk after about 5.5ms (PSPICE would not let me simulate further, complaining of the capacitor in the tank changing too fast. In output file PSPICE says: "ERROR -- Time step = 14.00E-15 is too small in Transient Analysis at Time = 54.00E-15. Minimum allowable step size = 20.00E-15. The device which is changing too fast is C_C_space.") I did not specify a step this small. I specified 220usec print step, and step ceiling 240usec.

I'm not sure about the choice of the series resistor. I choose 10ohm to maximize the output current of the Square wave.

I created a circuit where the 47uH inductor is centered between the two parallel caps (120uF and 560uF). I rigged up a VPWL_RE_FOREVER source to output 2 cycles of the SPACE freq. then 4 cycles of the MARK freq. and then repeat. The oscillation frequency on the output remains near constant, which is NOT desired. Also, it's amplitude never peaks over 200mVpk. At startup it appears as more of an AM(amplitude modulation) signal, but by 30msec its amplitude stabilizes. PSPICE doesn't complain and lets me run it for 100ms.

Bottom line questions:
What's the best way to convert this square wave AFSK to sine wave AFSK? I tend to use the MAX2606 according to MAXIM's AN1869 as the FM-TX(Transmtter). Or would it be better to originate in sine wave AFSK w/ perhaps the NJM2211D or XR2206CP-F, or in triangular wave AFSK (XR-2209CP-F) The EXAR(XR) chips require higher voltage to operate; XR-2209CP-F 8V min and XR2206CP 10V min. I know there is a frequency offset not requiring a DCV(Direct Current Voltage) offset on the 4046 CMOS. On the EXAR or NJM, I'm not certain of their freq. offset abilities. On the FM-Rx(Receiver), I intend to use TDA7000 from Philips. According to FCC, need to keep Bandwidth of FM-Tx confined w/in 200kHz centered on my operating frequency of 107.9MHz. On the FM-Tx, I intend to keep the MARK freq. below 13.3kHz, to remove the need for pre-emphasis; which I believe amplifies freq. above this threshold on Tx and attenuates them on Rx to improve SNR(Signal to Noise ratio) - please correct me if I'm wrong. I've read that I should keep the shift between MARK and SPACE at an integer multiple of the keying rate (originally 1kBAUD, now 2kBAUD due to Manchester coding). Any opinion on the minimum number of cycles to use for the SPACE frequency? Is one cycle possible? or too idealistic? I've read about MSK (minimum shift keying) which only uses half a cycle (modified version of MSK used in cell phones, I believe).

I'd prefer to use passive components for conversion from square to sine to limit current consumption (intended for 9.6V NiCd 1000mAh battery use).

Let me know if there is any info I can provide to bring clarification to my post. I've uploaded PNGs of the schematic, time domain, and FFT. Also uploaded are the PSPICE files.

Thanks for any input!