I am trying to design a curcuit with a counter that uses the 7493 binary counter. My text book has the pin out diagramme and it says that the counter is a negetive edge triggered counter....

My circuit consists of a differentiator that sends a pulse to a 555 monostable multivbrator that generates a pulse for the 7493 counter.

The result is increment in 2s. The count goes from 0 to 1 to 2 and stops. This occurs if the 555 out put is generally low and goes high and then low on receiving a spike from the differentiator circuit (R and C).

The problem was avoided only by using a 1714 schmitt triggered NOT gate.

I still do not understand why this occurs. The counter could not be triggered on both edges (or can it?) Is it level triggered ?(how can it be when the book mentiones it a edge triggered?)

Please help....

Thank you.

A 555 draws current pulses from the supply of up to 400mA each time the output switches. If your supply isn't well-bypassed then the counter could be losing its supply when the 555's output switches high. (And I sound like a poet or rapper again, don't I?) :lol:

A few things to watch out for in the 749x series ripple counters:

(1) the counter is split into a ÷2 and a ÷8 (7493), ÷2 and a ÷5 (7490) or ÷2 and a ÷6 (7492) counter and you must take the output of the first ÷2 Qa and feed it to the CLK input of the second section and,

(2) the resets on these counters are active HIGH rather than active LOW. If you let them float, the counter will reset; in addition, the 7490 has reset-to-9 inputs which must also be held LOW to allow the counter to count.

(3) the power supply pins of these particular counters run counter to the "normal" pin locations on TTL chips. The 749x series were some of the first TTL chips designed and as such, did not fall into a standardization of supply pinouts, proably because at the time, because of where the supply points were on the die, it was the only way to get power in without crossing bonding wires or totally redesigning the chip.

You may notice that all TTL ripple counters all count on the negative-going edge while all TTL synchronous counters (and almost-synchronous counters such as the 7419x series) count on the positive-going edge. That's why it's dicey trying to cascade TTL ripple and synchronous counters.

Now, if you've taken care of the above two quirks and your counter is still counting to "2" and locking up (or repeating the count), you may have power supply glitches getting in. Be sure to bypass each counter AT THE POWER SUPPLY PINS with a 0.1µF disc ceramic capacitor, one for each counter. It's amazing how a lack of supply bypassing can change how clocked logic operates!

Dean

Originally Posted by Gorgon

The special thing with a true TTL input is the change of load on the driving output during the transition from 0 -> 1 and 1 -> 0. The output needs to source 0.4 mA and sink 1.6mA from 1 to 0.

Thanks Gorgon...I know I am posting after a long time...

I am unable to understand the "source .4mA and sink 1.6mA from 1 to 0"...This sounds like sourcing and sinking at the same time...Or have I misunderstood it ?

Thanks again.