D filp - Flop - Electronic Circuits Projects Diagrams Free

lord loh. · 29th January 2005, 03:41 PM

I read in a book that the Clear and the Prest of a D Flip Flop are asynchronous inputs...

I doubt...The clear shall not propagate to the RS FF section unless the D is 0 and CLK high....and the PRESET shall not have effect unless CLK=1 and D=1....

So How really to use a D FlipFlop with Prest and Clear ?

And am I right to say that a the PRESET and Clear are a way to bypass the CLK and use the D Flip Flop as an RS Flip Flop ?

laroche73 · 29th January 2005, 05:38 PM

Quote:

And am I right to say that a the PRESET and Clear are a way to bypass the CLK and use the D Flip Flop as an RS Flip Flop ?

Yes, as long as the "D" & "CLK" inputs are held at static levels. Be aware of the difference between asynchronous and synchronous "Clear" and "Preset" inputs. As the terms imply, synchronous inputs only affect the Flip-Flops' output on the appropriate clock edge, whereas asynchronous inputs are level sensitive and overide the synchronous inputs.

Dean Huster · 30th January 2005, 10:15 PM

What type number is this D flip flop? I've never known a flip flop (D, JK or one-shot) that did not have asynchronous preset and clear inputs, overriding any action regardless of their states on the synchronous inputs (D, CLK, J, K).

Dean

lord loh. · 5th February 2005, 01:19 PM

I was looking for a textbook circuits...

But I think that it is possible to use the asynchronous circuits by keeping static levels but still in D Flipflops, I am unable to figure this out...

If D and CLK are high, S=1 and R=0 (RS FF Section...) and now if I want to clear the FF the preset will not propagate to the flip flop...as they are and Gated...R=0 shall propagate only if CLk =1 and D=0

Am i wrong ?

williB · 5th February 2005, 05:20 PM

as Dean allready asked .. What number FF are you talking about?

Dean Huster · 5th February 2005, 10:23 PM

Every single D and JK flip flip in 74 and 4K series that I know of have asynchronous clear and preset inputs. They override all synchronous inputs regardless of their state or the state of the outputs. The only difference is that the TTL chips usually have active LOW asynchronous inputs while the CMOS versions have active HIGH inputs.

Check the data sheet for a 7474 D or 7476 JK and you'll see how they operate.

Dean

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29th January 2005, 03:41 PM	(permalink)
lord loh.	D filp - Flop I read in a book that the Clear and the Prest of a D Flip Flop are asynchronous inputs... I doubt...The clear shall not propagate to the RS FF section unless the D is 0 and CLK high....and the PRESET shall not have effect unless CLK=1 and D=1.... So How really to use a D FlipFlop with Prest and Clear ? And am I right to say that a the PRESET and Clear are a way to bypass the CLK and use the D Flip Flop as an RS Flip Flop ? __________________ Bharath Bhushan Lohray. M.Sc. Electronics.

30th January 2005, 10:15 PM	(permalink)
Dean Huster	What type number is this D flip flop? I've never known a flip flop (D, JK or one-shot) that did not have asynchronous preset and clear inputs, overriding any action regardless of their states on the synchronous inputs (D, CLK, J, K). Dean __________________ Dean Huster, Electronics Curmudgeon Contributing Editor emeritus, "Q & A", of the former "Poptronics" magazine (formerly "Popular Electronics" and "Electronics Now" magazines). R.I.P.

5th February 2005, 01:19 PM	(permalink)
lord loh.	I was looking for a textbook circuits... But I think that it is possible to use the asynchronous circuits by keeping static levels but still in D Flipflops, I am unable to figure this out... If D and CLK are high, S=1 and R=0 (RS FF Section...) and now if I want to clear the FF the preset will not propagate to the flip flop...as they are and Gated...R=0 shall propagate only if CLk =1 and D=0 Am i wrong ? __________________ Bharath Bhushan Lohray. M.Sc. Electronics.

5th February 2005, 05:20 PM	(permalink)
williB	as Dean allready asked .. What number FF are you talking about?

5th February 2005, 10:23 PM	(permalink)
Dean Huster	Every single D and JK flip flip in 74 and 4K series that I know of have asynchronous clear and preset inputs. They override all synchronous inputs regardless of their state or the state of the outputs. The only difference is that the TTL chips usually have active LOW asynchronous inputs while the CMOS versions have active HIGH inputs. Check the data sheet for a 7474 D or 7476 JK and you'll see how they operate. Dean __________________ Dean Huster, Electronics Curmudgeon Contributing Editor emeritus, "Q & A", of the former "Poptronics" magazine (formerly "Popular Electronics" and "Electronics Now" magazines). R.I.P.