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Old 31st December 2004, 06:18 PM   (permalink)
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Quote:
Originally Posted by Styx
Quote:
Unfortunately this precludes the easy use of the hardware PWM.
PWM is just a ON/OFF signal. A pic is a digital device dealing with ON and OFF so what is soo special abt the PWM pin, that another pic cannot do? If it is just sourcing current, nothing a BJT to boost that cant fix
The PWM pin is connected to specific hardware inside the PIC, you simply set a few registers and it runs without any further intervention. To alter it's output you simply change the value in one of the registers, it makes PWM so very easy!.

You can do PWM in software (and so use any pin), but it's fairly complicated to write, it doesn't run anywhere near as well as the hardware one does, and it takes lots of clock cycles - the PWM hardware takes no processor clock cycles at all!.

There are various PIC's which have two PWM outputs, this makes them VERY useful for motor control in a small robot or model.
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Old 31st December 2004, 06:22 PM   (permalink)
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Quote:
Originally Posted by samcheetah
i dont want to interrupt the ongoing discussion here but ive found a H-bridge circuit and its driver in the August 2004 issue of EPE. what are your comments about it
It's a crude little circuit, but fine for what it was intended. My biggest problem with it is driving the motor from the emitters, you lose so much battery voltage by doing that, and the transistors run hotter because you can't get enough base current into them.
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Old 31st December 2004, 06:46 PM   (permalink)
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okay Nigel ill note that

actually we did a simulation in our lab in which we had to build a H-bridge circuit and drive a motor with it and measure the voltages and the currents. the circuit that our teacher gave us was simillar to this one. the motor was being driven by the emitters. uptil that day i had only seen H-bridges in which the upper transistors were PNPs (or P channel MOSFETs) and the lower ones NPNs (or N channel MOSFETs) so the motor was driven by the collectors. i told the teacher that the configuration that you have given us is wrong and it should be the other way round. he said that it doesnt matter, you just have to make a path for the current to flow. could you you explain how the base current is low and the voltage drop is higher
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Old 31st December 2004, 07:06 PM   (permalink)
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The selected C on the gates (the value of about 10nF was needed) of the N devices may solve the spike problem at the rising edge but there's still a problem on the falling edge.
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Old 31st December 2004, 07:12 PM   (permalink)
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As I said It must be tuned.

Increase R4 to about 7k
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Old 31st December 2004, 07:21 PM   (permalink)
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Makes no difference even with a 20K. You most probably need a big cap at the top as well.
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Old 31st December 2004, 07:28 PM   (permalink)
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Cap's at the top seems to work.
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Old 31st December 2004, 07:36 PM   (permalink)
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Quote:
Originally Posted by Styx
I appreciate that you have only One PIC PIN (the PWM pin) BUT in your figure you have 2 signals comming from the PIC.

PWM
You have a "PWM Pulse" and a "PIC Input" I take it by "PIC input" it is actually an output from the PIC?


So you do have at lest 2 pins available?

Right Now you are saying you are using "PIC Input" as some form of H-Bridge direction signal? and the "PWM Pulse" as your driving pulse?

PIC Input LOW
With "PIC Input" LOW The no matter what the "PWM Pulse" signal does no current will flow

PIC Input HIGH
With "PIC Input" HIGH there is a problem. With PWM Pulse LOW: There is no path for current to flow around the supply - ok BUT you have both top FET's ON!!! Zero-loop across the motor, that ok.

BUT you are also supplying gate voltage to the bottom FET's They are now ON!!!! the only saving grase is there is no close-path for the supply current to flow

However, When PWM Pulse is fired and thus turning on the lower FET you now are A 5 FET's on and effectivley a short across the supply

I fail to see how this is ever expected to work, upless I am missing soming



.
Maybe i wasnt clear enough. Sorry about that. Just in case that you might have misunderstood, currently i have 3 pins altogther. 1 to control forward and one to control reverse ( I labelled them PIC input, i think u might have misunderstood, really sorry about that). The 3rd pin is the PWM pin to drive the motor.

By having 2 separate pins, i am able to complement the inputs to each other. Therfore, i dont think any shoot-throughs would happen.

This is what happened during my circuit testing.
I had my forward output HIGH and my REVERSE output LOW. I inputted a 100% duty cycle PWM signal into my LOWER FET. No overheating occurred.
Then when i changed my cycle to 50%. LOTS of distortion occurred and suddenly it starts to HEAT up real quick. However, having the reverse and forward output complementing each other, i dont think any shoot-through occurs.
Anyway, thanks for the great circuit. I definitely would change to yours. The ON OFF timing seems FAR better
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Old 1st January 2005, 01:13 AM   (permalink)
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Quote:
Originally Posted by TheOne
Makes no difference even with a 20K. You most probably need a big cap at the top as well.
I found this strange, so after trying another FET model I re-run the simulations. This time the delay was enough with a much smaller value of C (100pF) and the 7k resistor suggested by Styx originally.

That specific model must have been flawed as it made no real difference if I had a 1k gate resistor or 100k!
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Old 1st January 2005, 10:17 AM   (permalink)
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Quote:
Originally Posted by samcheetah
actually we did a simulation in our lab in which we had to build a H-bridge circuit and drive a motor with it and measure the voltages and the currents. the circuit that our teacher gave us was simillar to this one. the motor was being driven by the emitters. uptil that day i had only seen H-bridges in which the upper transistors were PNPs (or P channel MOSFETs) and the lower ones NPNs (or N channel MOSFETs) so the motor was driven by the collectors. i told the teacher that the configuration that you have given us is wrong and it should be the other way round. he said that it doesnt matter, you just have to make a path for the current to flow. could you you explain how the base current is low and the voltage drop is higher
In the existing configuration (with the emitter the output), the emitter has to be 0.7V lower than the base - so you're losing at least 0.7V straightaway, plus losses in the transistor.

Then the base current, this is governed by ohms law, and is equal to voltage across the resistor divided by the value of the resistor. Because the base has to go high, you've got no voltage to work with - so the base can't go as high as 12V (again restricting the output voltage).

Assuming the base can get within 0.3V of the 12V rail, and the transistor has a gain of 100, and it's driving a motor requiring 1A. This gives a base current of 10mA. So to calculate the base resistor, 0.3/0.01, giving only a 30 ohm resistor feeding the base. The values used in the circuit shown will limit the output current considerably, resulting in a much lower voltage to the motor, and the transistors running MUCH hotter than they need to. There's also the obvious disadvantage of two 30 ohm resistors permanently across the power supply, wasting lots of your battery power! (one from each side of the H-bridge, either top or bottom, depending how it's switched).

My 'best case' calculation above would only supply a theoretical maximum of 10V from the 12V supply - but the values in the circuit would be far less under load.

With the transistors the other way round, things get MUCH better - for a start the voltage drop in that configuration is much less - 0.2V or 0.3V may well be possible, depending on the transistor. You've also got MUCH more voltage to play with for your base current, instead of the paltry 0.3V I suggested above, you've now got a whopping 11.3V instead! - so you don't need 30 ohm resistors anymore!.

If we assume a worst case of 0.5V drop across the transistors, we now have a reliable 11V for the motors, from the 12V supply, with the transistors turned hard ON, and running a great deal cooler.
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Old 1st January 2005, 01:07 PM   (permalink)
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But With Common-Collector there is chance of shoot-throughs (common-emitter doesnt have this)

I'm not saying common-emitterCommon-collector is the better circuit, equally I am not saying Common-collector is the better one (although this is the arrangement I would go for). Both topologuies have their advantages and disadvantages and their uses.

Best thnig about engineering: No real wrong answers, just better answers
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Old 1st January 2005, 02:04 PM   (permalink)
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Quote:
Originally Posted by Styx
But With Common-Collector there is chance of shoot-throughs (common-emitter doesnt have this)
In what way?.
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Old 1st January 2005, 02:17 PM   (permalink)
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you get them during a HIGH to LOW input to the leg - TheOne has already shown that with FET-based bridge leg. he same stands up true for BJT phase leg.

There is a finite time it takes to switch a device ON and OFF. It is worse for switching OFF the P-type/PNP since it takes alot longer than the N-type/NPN to turn-on.

Thus there is a finite time when both devices are ON (be it in their active region) Thus they dissipate alot of power and over-stress the devices.


There are two causes of shoot-thoughs. Bad driving and thus turning on both switches in a leg OR during a transition during the switching period.

It is due to teh switching times that I always put interlock into my commutation stage, thus ensuring that when I turn OFF the device that is on (in a leg) there is a period before I start to turn ON the other device, thus giving the other device to turn-off fully. This time is based of the switching charateristic of the switches being used



It is this type of shoot-through that I was stressinb when Fabbie said his FET's were getting hot.

I think he interpreted that shoot-through suggestion as a control "both switches ON" type. When I ment a switching shoot-through


The switching shoot-through will be inherent in hsi design. Without incorportating a dedicated drive per switch and added interlock logic, the topology I chose slows down the gate voltage to the FET's and thus slowing down the time it take a gate signal to reach the threshold voltage level.

Essentally a crude method of making interlocks.
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Old 1st January 2005, 02:46 PM   (permalink)
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Quote:
Originally Posted by Styx
you get them during a HIGH to LOW input to the leg - TheOne has already shown that with FET-based bridge leg. he same stands up true for BJT phase leg.

There is a finite time it takes to switch a device ON and OFF. It is worse for switching OFF the P-type/PNP since it takes alot longer than the N-type/NPN to turn-on.
I see what you mean, but I wasn't suggesting simply changing the transistors over, but using a correctly designed circuit for the configuration I suggested. I would tend to cross-couple the bottom transistor of one leg with the top of the other - this avoids any potential problems like that. It obviously introduces the possibility of turning all four devices ON at the same time (which isn't a good thing!) - but you can counteract that either in hardware, or by carefully written (and hopefully bug-free) software.

In any event, S/C failure of any one device in an H-bridge is likely to be fairly catastrophic in a similar fashion :lol:
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Old 1st January 2005, 05:12 PM   (permalink)
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Yer I know - H-briges are are not he most fault-tolerant things around. makes FMEA's easier
"what happens if this occurs - Blows up"
"what happens if this occurs - Blows up"
"what happens if this occurs - Blows up"
...

Yes tying Gates to the other side will eliminate the posiibility of a shoot-through since it's turn-on/off is now descretly tied to the the other device turning-off/on

I just wanted to stess that there are other factors IF someone wanted to up the power handling on a H-bridge and was not giving switching times of power devices the respect they need
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