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| General Electronics Chat This forum is for general chat about electronics, eg: Dont know what a part does? Dont know how to read a circuit? Want to get an opinion? |
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| The output of , for example, a D-FF is unknown on power-up. Am I correct? If I'm correct, then could you please tell me how to get rid of this unknown signal and pull it down or up. Regards | |
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simply apply a logic low to the D input on power up will give you a low on P/U.. NOTE If this chip (which one ?) has a preset and clear the above explanation is moot.. | ||
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| >> the output of a D type FF is whatever is at the input during power up simply apply a logic low to the D input on power up will give you a low on P/U << This is my problem. I have to apply logic 1 all the time, but I need logic 0 on power-up at the output pin. I think I need some kind of logic here. The chip is 74HC74, which has asynchronous set and reset ability. | |
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| i need more info .. | |
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| is this a theoretical or practical question | |
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| well if you had an actual circuit ..i could ask how come you cant apply a logic zero... | |
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| you can do it with an RC charging circuit on the preset pin, this will set the logic when power is applied, check the net for more info | |
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Now, what do you think? | ||
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| I don't understand how you got that result. 74HC74 has active low set and reset. Since S1 (reset) is low at clock time, the Q output should stay low at all times. | |
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To force the Q output low on power up, use the circuit below. The R1*C1 time constant depends on your power supply turn-on rise time, but 10ms - 100ms should be OK. | |||
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