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74HC595 Latch Pin-What is that?

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https://www.nxp.com/acrobat_download/datasheets/74HC_HCT595_4.pdf

See datasheet (link above) for details.

Simply, it transfers the 8 parallel output bits of the internal shift register to the output pins on the device when the enable pin is active. The transfer occurs on the transition from logic 0 to logic 1 on the latch input. This is generally useful to ensure that the output bits are presented only when you want them to be and remain stored until you latch it again.
 
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https://www.nxp.com/acrobat_download/datasheets/74HC_HCT595_4.pdf

See datasheet (link above) for details.

Simply, it transfers the 8 parallel output bits of the internal shift register to the output pins on the device when the enable pin is active. The transfer occurs on the transition from logic 0 to logic 1 on the latch input. This is generally useful to ensure that the output bits are presented only when you want them to be and remain stored until you latch it again.
Close but not quite. The latch signal transfers data from the internal shift register to the internal latch. OE (output enable) is used to either put the latched data on the output pins or tristate the pins.

The neat thing is you have stable data on the output pins while you shift new data in. Cycle the latch signal and the old data becomes new data. It hides the shifting.
 
Close but not quite. The latch signal transfers data from the internal shift register to the internal latch. OE (output enable) is used to either put the latched data on the output pins or tristate the pins.

Totally understood.
 
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