Hi guys,
just wondering if any body can help me out with a design for a 3 bit synchronous +ve edge triggered up/down counter using d-type latches. i have got no clue of how to go about doing it. the counter is suppose to counter from zero through to seven and then down from seven back to zero. the direction of the count is determined by an external input. also wen ever the direction of the count is changed it should automatically start counting down, doesnt really need to get to seven.

thanks
john

 

Look at the schematic of the 74AC191 and chop off the circuitry for the most significant bit.

 

Read this, it will all become clear.

http://www.usna.edu/EE/ee332/EE332Sp...er_II_Soln.pdf