I do! - TTL is either HIGH or LOW, a simple logic design, with the specifications well defined. Tri-state (which, from your description, is exactly what I suspected) is not either, it's a simple floating pin, and doesn't meeet TTL specifications.

I can think of a number of ways to check if a line is 'tri-state', but none of them could be done with TTL logic chips, simply because it's not a TTL level.

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the 74LS125A is a Quad bus-buffer gate with three-state outputs. the 74LS240 is an Octal inverting three-state driver. the 74LS244 is an Octal non-inverting three-state driver. the 74LS374 is an Octal three-state positive-edge-triggered D flipflop.

all these ICs are TTL. and have a look at

http://www.spawar.navy.mil/sti/publi.../pubs/td/2631/

and u say three-state (or better well known as TRISTATE) does not meet TTL specifications.

look i dont want to get into a tristate fight or something like that. i just want an idea from u guys for a circuit that will do what i want.

 

It still doesn't, TTL can either be low (below a certain voltage) or high (above a certain voltage) - it's a binary logic system. There's a certain region between these two voltage where it's not a valid signal (not meeting TTL spec). But this isn't a 'tri-state' region, it's just not allowed in TTL.

So called 'tri-state' TTL chips simply switch the outputs completely off, not high or low (that depends entirely on the external circuitry) - it effectively removes the chip from the circuit.

I see no way to detect a chip set to tri-state with the limitations you've set, also in a circuit using tri-state chips, if one chip is set to tri-state another one is usually switched to take it's place (which is usually why it's done) - in which case there would be no way you could detect it.

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this is the so called TRISTATE. this is what TRISTATE is. the output is completely off.

i agree

u know everything and still u say it isnt TTL logic.

there has to be some way

plz help me

 

You could only detect it if another chip isn't holding the bus in a TTL state, other wise it would be either high or low, as the TTL spec requires.

Assuming it is in a tri-state mode, and no other chip has control of the line, two identical resistors one to +ve supply, and one to 0V would hold the line at 2.5V - which you could easily detect, but not with your limitation of only using TTL logic chips. The resistors (assuming the vlaues were chosen correctly) wouldn't affect the normal high/low operation of the probe, but when the probe is disconnected (or connected to a tri-stated line) the voltage would go to 2.5V.

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i didnt get a word of what u said Nigel. okay i get the point that TRISTATE cannot be detected using TTL. so u give me a "CMOS solution" to my problem. but plz dont use any PICs

 

You couldn't do it with CMOS logic either, because it's not a logic state, either TTL or CMOS - the way to detect it would be to use two resistors across HT and ground (as I mentioned before) and a window comparator using a couple of opamps - the window comparator detects the input being half way between the supply rails, the two resistors force a tri-state rail to go to that voltage.

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if TRISTATE isnt TTL compatible and it isnt CMOS compatible either then what is it compatible with??

im really confused. i thought this project would be a simple one.

listen guys i have heard of a book published by the ARRL. its name is "Build your own test equipment" by Carl J. Bergquist. i saw the table of contents of this book at a site and it has a tristate logic probe. now i cant find this book in my town. so please if someone has this book plz tell me how did the author of this book make the tristate logic probe

 

I think there was a bit of confusion, it's not the tristate he is after.
All he wants is to identify all possible signals:
- zero (TTL level less than 0.8V)
- one (TTL level higher than ca. 2.5V) and
- undefined or floating (level that is between 0.8 and 2.5V).

If so, maybe this link would help:

http://www.belza.cz/measure/logsonda.htm

 

thanx panic mode, nice probe

but iam after TRISTATE. not the forbidden voltage range.

 

Google returned following link as #1 hit for >tristate logic probe<
http://www.xgames3d.com/articles/probe/probe.doc

If you know how it works you will notice that uses same logic like
the previous link - it creates "tristate" signal if input is neither
zero nor one.

Using comparators as Nigel suggested would give you chance to
easily define "tristate window". The smaller the window, the higher
probe sensitivity. It's because even smaller current leaks would
disturbe the balance of the tip.

You are more than welcome to build it but I am not too convinced
that results would be as reliable as you might expect. More over,
you would have to look for special parts or sacrifice performance.
Maybe it's me but logic probe that cannot handle at least 20MHz
is not worth the trouble (unless you want to use it on something
as slow as LPT port). I didn't use comparators in a long time but
if I remember correctly, most of them used to be usable up to
one or max 5MHz. (on the other hand, things do progress fast so
who knows, your local Radio Shack might have inexpencive parts
that can handle 100MHz).

Here are some simple probes using OPs as comparators:
http://www.swansontec.com/sprobe.htm
http://www.uoguelph.ca/~antoon/circ/probe3.html
http://uhaweb.hartford.edu/jmhill/ee.../logictest.png

 

Heres a link to a TTL logic probe i designed and built a few eons ago in which the high/low LEDs light up only when the probe is connected to the point under test ( that may be what Sam means by "tristate"). The circuit has the added advantage of displaying the letters "H" for high or "L" for low using a common 7-segment display.

http://www.geocities.com/nettron1000/LogicProbe.html

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thanx all u guys. i built a logic probe and it works!!!!!. it tests a HIGH, LOW and a TRISTATE. im not sure about the loading effect it has and if it is workable at 20MHz.

anyway thanx again for all your help

 

How about posting the circuit?.

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here u go

node 3 is the probe terminal

Attached Images

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