Dear All,

First, thanks for reading my writing. I have design a full-bridge DC-AC inverter with 12Vdc input voltage and 220Vac output voltage. In my inverter, I use a 8051 micro-controller to give the "sine" PMW singnal. Since I am designing the full bridge version, the 8051 uP gives complementary signals. I choose four "Ix" (I don't know can I state the brand name or not, so I hope all of you will know which one it is) Power-NMOSFETs to be the full-bridge stage. In order to drive those "Ix" NMOSFET, the "Ix2110" driver is used. This gate driver use the boostrap method to drive the high-side NMOSFET.
Up to now, at least myself, think the circuit is okay
However, when I connect the the primary side of the transformer to my full-bridge output, with the secondary side connected with a pure resistive loading, it should be okay to measure the step-up "sine" PWM signal at the secondary side (I think). Unfortunately, I cannot measure anything (all are noise). More worse is that, after several seconds, the "Ix2110" driver "dead" in a way I don't know what is happening.
So, any one can help me?
If you want more information, I am willing to supply them
Thansk alot

Patrick

 

post your circuit schematic.

 

I will try to help.
Please provide a schematic of your circuit.

 

Attached is my schematic. The power NMOSFETs have the intrinsic body diode. Also, I have implemented the deadtime in the PWM signal generated from the 8051. Actually, I am guessing that, is it the voltage or the current at the Vs node (boostrap feedback node) too fast (di/dt or dv/dt) or too high in absolute value within the deadtime zone, which makes the driver IC "dead".

Thanks alot
Patrick

Attached Images

inverter_163.gif (13.4 KB, 1745 views)

 

. Did you check the 5V for the u-controller ? From the schematic, the Zener is in backwards. Maybe a typo.....??

You say that you are generating a 'sine' - wave output from the 89C51.
The 89C51 has digital ports. ......??

1. From some of the 'applications', a cap ~ 2.2uF is connected from Vs to LO. I expect that the 'sink' FETS need a boost voltage as well as the 'source' FETS.

2. I noticed that there are no decoupling capacitors on the IRF2110 12V to ground. Ditto that on the 89C51.

3. If the 5V is O.K., try the folowing:

Remove the load on the secondary. Remove the PWM signals from the u-controller.
Simulate the inputs with a reistor pull-up to 5V and a resistor pull-down to ground. Result ...> this should lock the IR2110's into a half-bridge mode. Check the loop = Source FET from 12V to XMFR primary to sink FET to ground. Both FETS = ON and conducting.
Reverse the inputs, then Repeat for the remaing two FETS.
If O.K., return the inputs to the u-controller, And see what happens(No -Load)

Do you have an oscilloscope ?

Let us know.

 

Are you using Don Lancaster's "Magic Sinewaves"? I have a liter of blown power FETs, have not found the problem yet, so when you solve your problem, please let me know.

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>Did you check the 5V for the u-controller ? From the schematic, the >Zener is in backwards. Maybe a typo.....??

Ans: Yes, it is a typo. Thanks. Since, I have check the 5V, which is relatively stable.

>You say that you are generating a 'sine' - wave output from the 89C51.
>The 89C51 has digital ports. ......??

Ans: Actually, the "sine" I am referring is the PWM signal (which is a train of digital pulse from the 89C51), "sine" means that the pulse width of the PWM signal is proportional to the magnitude of the signa wave.

>1. From some of the 'applications', a cap ~ 2.2uF is connected from Vs >to LO. I expect that the 'sink' FETS need a boost voltage as well as >the 'source' FETS.

Sorry to say that I don't agree with your comment. Since the NMOS Vth is around 2-5V and the maximun voltage ta the LO port is Vdd (which is 12V in my design). So, no boosting is needed.

>2. I noticed that there are no decoupling capacitors on the IRF2110 12V >to ground. Ditto that on the 89C51.

Yes, I just want to save some time, even my PCB already resevred the de-coupling cap. slot. In my mind, may be I should do it to eliminate the unknow.

>Remove the load on the secondary. Remove the PWM signals from the u->controller.
>Simulate the inputs with a reistor pull-up to 5V and a resistor pull-down >to ground. Result ...> this should lock the IR2110's into a half-bridge >mode. Check the loop = Source FET from 12V to XMFR primary to sink >FET to ground. Both FETS = ON and conducting.
>Reverse the inputs, then Repeat for the remaing two FETS.
>If O.K., return the inputs to the u-controller, And see what happens(No ->Load)

Ans: Actually, it is very dangerous, since there is a leakage inductance in the transformer. If I apply such biasing condition, the current will keep increasing until they reach the maximun limit of the mosfet. Any comment on my statement? Thx

>Do you have an oscilloscope ?

Ans: Yes

Thanks alot Fred

P.S. Attached is the updated schematic with the correction on the diode direction.

Attached Images

inverter_pic2.GIF (13.5 KB, 1691 views)

 

1. Yeah... you might want to do the decoupling thing. It is simple and S.O.P. (to avoid headaches).

2. I agree about the drastic half-bridge mode. The FETS will fry !
Unless you substitute the primary winding with a power resistor.

But try the caps.

 

Dear Patrick,
I am not an expert in power design but I think you could have problem with the absence of dead time between an up and low commutation of the MOSFET.
I try to explain more cleary.
I call the upper stage as STAGE A (witch include Gatedriver and High and low side MOSFET) and the lower stage as STAGE B.

First of all suppose to drive the Upper MOSFET of the STAGE A and the Lower stage from STAGE B.
There isn't problem until you invert the polarity of the sine wave (it go negative). Where this condition happen you probably have the upper MOSFET of STAGE A in ON state and you drive the lower MOSFET of the same STAGE. This problem lead the STAGE A to short to ground.

In my opinion, when you use a FULL bridge to control a load you should use a Full Bridge controller so you can obtain a desider dead time that allow to save the Mosfet from short to ground connection.

Best Regards
Fabio Antonini
(Italy)

Attached Images

inverter_pic2_400.gif (14.0 KB, 1156 views)

 

Agreed. Just replace the transformer with a resistor. One that can handle the watts, but small enough where you know you can expect your current flow from the transistors.

Also, this isn't quite my area, and so it may not matter, but shouldn't you be using an NMOS on the bottom of each pair, and a PMOS in the top? Isn't that how this is conventionally done?

And this is a question that goes out to all: When you speak of the coupling caps, are you just referring to a cap from the 12V in to ground?