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| Electronic Projects Design/Ideas/Reviews Are you building an electronic project or want to? Maybe you need some assistance? Come and submit your electronic questions here and let our experienced members find a solution. |
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New Member
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Hi Guys I Am Doing My Masters In Ee In Utarlington I Need A Project On Counter And Timer Circuits Which Is To Be Implemented At Transistor Level And Has To Be Simulated In Pspice........i Want To Drive The Counter With 555 Timer In Astable Mode.......PLEASE HELP ME GUYSL.........
Last edited by chaluvadi; 4th May 2008 at 01:11 AM. |
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Experienced Member
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What is Utarlington?
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university of texas at arlington
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Experienced Member
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Choose something more complicated, a 555 timer based project is more typical for the final year of Junior school than a degree.
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Experienced Member
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But he must make an old TTL counter from scratch using millions of transistors.
__________________
Uncle $crooge |
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Experienced Member
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I am astounded that a Master's candidate would be asking for help from a hobbyists' forum. Chaluvadi, what part(s) of the project do you need help with? |
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New Member
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I have been going through the internet and library for a transistor level 555 timer and counter circuit that can be simulated and spice .......... i have got model of 555 timer with rs flipflops and nand gates ........ i can actually realise them but the schedule i have got is too hectic so.......i dont have a choice but to ask in the forum........
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Experienced Member
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The TS555 datasheet has a schematic. You will have to work out the device sizes.
EDIT: Here is the subcircuit for a CMOS 555. It probably does not represent the TS555 schematic. I make no claims for its accuracy, and I don't remember where I got it. Code:
.SUBCKT 555C GND TRIGGERbar OUTPUT RESETbar CONTROL THRESHOLD DISCHARGE VCC
*
* CMOS 555 TIMER
*
R_R1 CONTROL VCC 150K
R_R2 2 CONTROL 150K
R_R3 GND 2 150K
E_EMIR VDD GND VCC GND 1
M_M1 DISCHARGE 1 GND GND NCHAN555 L=2U W=1000U
E_EVAL 1 GND 13 GND 1
R_U6_R1 TRIGGERbar 2 1000G
R_U6_R2 TRIGGERbar 2 1000G
E_U6_E1CMP 3 GND 2 TRIGGERbar 10K
R_U6_R3 3 23 10MEG
R_U6_R4 GND 23 10MEG
D_U6_D2CLMP 23 4 DIODE
D_U6_D1CLMP GND 5 DIODE
V_U6_V2 23 5 dc 0.8V
E_U6_E1 4 GND POLY(1) VDD GND -0.8 1
R_U7_R1 CONTROL THRESHOLD 1000G
R_U7_R2 CONTROL THRESHOLD 1000G
E_U7_E1CMP 6 GND THRESHOLD CONTROL 10K
R_U7_R3 6 21 10MEG
R_U7_R4 GND 21 10MEG
D_U7_D2CLMP 21 7 DIODE
D_U7_D1CLMP GND 8 DIODE
V_U7_V2 21 8 dc 0.8V
E_U7_E1 7 GND POLY(1) VDD GND -0.8 1
M_U2_U1_M4 9 OUTPUT GND GND NCHAN555 L=2U W=1000U
M_U2_U1_M3 9 17 GND GND NCHAN555 L=2U W=1000U
M_U2_U1_M6 10 9 GND GND NCHAN555 L=2U W=300U
M_U2_U1_M8 13 10 GND GND NCHAN555 L=2U W=250U
M_U2_U1_M1 11 OUTPUT VDD VDD PCHAN555 L=2U W=1000U
M_U2_U1_M2 9 17 11 11 PCHAN555 L=2U W=1000U
M_U2_U1_M5 10 9 VDD VDD PCHAN555 L=2U W=300U
M_U2_U1_M7 13 10 VDD VDD PCHAN555_OUT L=2U W=350U
M_U2_U2_M4 12 18 GND GND NCHAN555 L=2U W=1000U
M_U2_U2_M3 12 13 GND GND NCHAN555 L=2U W=1000U
M_U2_U2_M6 14 12 GND GND NCHAN555 L=2U W=300U
M_U2_U2_M8 OUTPUT 14 GND GND NCHAN555 L=2U W=250U
M_U2_U2_M1 15 18 VDD VDD PCHAN555 L=2U W=1000U
M_U2_U2_M2 12 13 15 15 PCHAN555 L=2U W=1000U
M_U2_U2_M5 14 12 VDD VDD PCHAN555 L=2U W=300U
M_U2_U2_M7 OUTPUT 14 VDD VDD PCHAN555_OUT L=2U W=350U
M_U2_U3_M1 16 25 VDD VDD PCHAN555 L=2U W=1000U
M_U2_U3_M2 17 24 16 16 PCHAN555 L=2U W=1000U
M_U2_U3_M3 17 24 GND GND NCHAN555 L=2U W=1000U
M_U2_U3_M4 17 25 GND GND NCHAN555 L=2U W=1000U
M_U2_U4_M1 18 20 VDD VDD PCHAN555 L=2U W=2U
M_U2_U4_M2 18 RESETbar VDD VDD PCHAN555 L=2U W=2U
M_U2_U4_M3 18 20 19 19 NCHAN555 L=2U W=1000U
M_U2_U4_M4 19 RESETbar GND GND NCHAN555 L=2U W=1000U
M_U2_U5_M1 20 24 VDD VDD PCHAN555 L=2U W=2U
M_U2_U5_M2 20 21 VDD VDD PCHAN555 L=2U W=2U
M_U2_U5_M3 20 24 22 22 NCHAN555 L=2U W=1000U
M_U2_U5_M4 22 21 GND GND NCHAN555 L=2U W=1000U
M_U2_U6_M2 24 23 GND GND NCHAN555 L=2U W=1000U
M_U2_U6_M3 24 23 VDD VDD PCHAN555 L=2U W=2U
M_U2_U7_M2 25 RESETbar GND GND NCHAN555 L=2U W=1000U
M_U2_U7_M3 25 RESETbar VDD VDD PCHAN555 L=2U W=2U
R_U2_R1 RESETbar GND 250G
J_J1 VCC GND GND JNEMOD
R_R6 GND VCC 192K
*
.MODEL DIODE D RS=0.01
.MODEL PCHAN555 PMOS CGBO=1P CGDO=1P CGSO=1P VTO=-0.2
.MODEL NCHAN555 NMOS CGBO=1P CGDO=1P CGSO=1P VTO=0.2
.MODEL PCHAN555_OUT PMOS CGBO=1P CGDO=1P CGSO=1P VTO=-0.2 CBD=200P
.MODEL JNEMOD NJF VTO=-2.5 BETA=5.12U
.ENDS 555C
*
*|* CMOS 555 TIMER CONNECTED IN ASTABLE OPERATION
*|.LIB MISC.LIB
*|.PARAM CVAL=20N
*|VRST 4 0 PULSE(1 0 700U 1U 1U 400U 1)
*|C2 3 0 10P
*|VCC 8 0 5
*|RA 8 7 4700
*|RB 7 6 2200
*|C1 6 0 {CVAL}
*|X1 0 6 3 4 5 6 7 8 555C
*|CTRL 5 0 10P
*|.IC V(6)=0
*|.TRAN 10U 800U
*|.PROBE
*|.END
Last edited by Roff; 5th May 2008 at 01:47 AM. |
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New Member
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thanks for ur reply roff............i have got a schematic for 555 timer that is not working and its saying as less than two connections at node i havent figured that out because this was the first time i was using pspice..........the code is as follows............
.SUBCKT UA555 32 30 19 23 33 1 21 * TR O R F TH D V * * *SYM=UA555 *DWG=C:\SPICE\555\UA555.DWG Q4 25 2 3 QP Q5 0 6 3 QP Q6 6 6 8 QP R1 9 21 4.7K R2 3 21 830 R3 8 21 4.7K Q7 2 33 5 QN Q8 2 5 17 QN Q9 6 4 17 QN Q10 6 23 4 QN Q11 12 20 10 QP R4 10 21 1K Q12 22 11 12 QP Q13 14 13 12 QP Q14 0 32 11 QP Q15 14 18 13 QP R5 14 0 100K R6 22 0 100K R7 17 0 10K Q16 1 15 0 QN Q17 15 19 31 QP R8 18 23 5K R9 18 0 5K R10 21 23 5K Q18 27 20 21 QP Q19 20 20 21 QP R11 20 31 5K D1 31 24 DA Q20 24 25 0 QN Q21 25 22 0 QN Q22 27 24 0 QN R12 25 27 4.7K R13 21 29 6.8K Q23 21 29 28 QN Q24 29 27 16 QN Q25 30 26 0 QN Q26 21 28 30 QN D2 30 29 DA R14 16 15 100 R15 16 26 220 R16 16 0 4.7K R17 28 30 3.9K Q3 2 2 9 QP .MODEL DA D (RS=40 IS=1.0E-14 CJO=1PF) .MODEL QP PNP (BF=20 BR=0.02 RC=4 RB=25 IS=1.0E-14 VA=50 NE=2 + CJE=12.4P VJE=1.1 MJE=.5 CJC=4.02P VJC=.3 MJC=.3 TF=229P TR=159N) .MODEL QN NPN (IS=5.07F NF=1 BF=100 VAF=161 IKF=30M ISE=3.9P NE=2 + BR=4 NR=1 VAR=16 IKR=45M RE=1.03 RB=4.12 RC=.412 XTB=1.5 + CJE=12.4P VJE=1.1 MJE=.5 CJC=4.02P VJC=.3 MJC=.3 TF=229P TR=959P) .ENDS ********** * Sample Test Circuit for the UA555 Timer: Astable Mode * The UA555 timer model is designed for low frequency * applications, up to 100Hz. *INCLUDE IC.LIB .TRAN 1MS 100MS 0 25US UIC .OPTIONS LIMPTS=5001 ITL5=0 RELTOL=.0001 *ALIAS V(1)=VOUT *ALIAS V(5)=VRESET *ALIAS V(6)=VCTRL *ALIAS V(4)=VCAP .PRINT TRAN V(1) V(5) V(6) V(4) V2 2 0 PULSE 0 5 R3 2 3 1000 R4 3 4 5000 C3 4 0 .001M X2 4 1 5 6 4 3 2 UA555 .END ********** |
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Experienced Member
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Your model worked for me on LTspice. I don't use Pspice, so I can't help with your problem.
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Experienced Member
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New Member
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where can i get this ltspice is there a link is this free ware.......
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New Member
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where can i get this ltspice is there a link is this free ware.......
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New Member
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hey thank u very much man........i had worked it on ltspice and it worked out well ...... can u get me a counter that runs with 555 astable circuit in transistor level........
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Experienced Member
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