Here's a design idea that may be useful if you want to generate a digital decimal readout from a serial binary input without using a Microprocessor, PROM, or Gate Array. A Google search to do this conversion revealed only one obsolete TTL circuit that could convert binary to the BCD required for the decimal readout; all the other solutions used some sort of computer algorithm. After some thought I derived a general concept for this that uses standard logic circuits. It consists of a serial shift register with parallel output, a binary up/down counter with jam inputs, a BCD up counter, a BCD to 7-segment LED readout decoder, and a clock (which is normally part of the serial input data). The BCD counter and BCD to 7-segment decoder can be combined in one unit if devices such as the CD4026B or CD4033B are used

In operation the serial shift register initially captures and holds the serial word. This is next parallel transferred (jammed) to the binary up/down counter (configured to count down). The two counters then start with the same clock input, the binary counter counting down and the BCD counter counting up from zero. When the down counter reaches zero, the counting is stopped. The BCD counter now contains the value of the serial word in BCD format. This BCD signal drives the BCD to 7-segment LED drivers to display the output in decimal format. This sequential process is relatively slow, but since you generally only need to update a visual numeric output a few times a second at most, even slow speed 4000 series CMOS logic will be adequate (expect possibly for the serial register if the serial input data is at a high frequency). For example, with a 1MHz clock a 16-bit word can be updated every 66ms.

The number of chips required for this will depend upon the length of the serial word. For example 16 bits would require a 16 bit shift register (or four 4-bit registers), a 16-bit counter (or four 4-bit counters), five decade BCD counters, and five BCD to 7-segment converters for the five digit readout. (16 bits has a maximum decimal value of 65,536).

This approach can, of course, also be used with a parallel binary signal. The shift register is not needed, and the parallel word is directly jammed into the binary counter to start the conversion.

 

Nice design idea, but why would some one avoid a microcontroller?

__________________
Khizer Naeem Mughal
IIUI

 

I realize in the computer world it seems strange to avoid a microcontroller to do a task it can readily perform but, in my case, it's related to my working in the defense industry where the required documentation to describe its use, certify the program, and verify that the uC is indeed performing the required operation is a significant (and tedious) part of the task. Using off-the-shelf ICs is much simpler from that point of view. And of course a uC needs some type of programmer for the particular uC you're using which also may not be readily available or requires a significant additional purchase.

Of course generating the timing signals for the non-uC approach is not trivial either so the design effort for either approach may be comparable. It may hinge on whether you prefer software design or logic design to do the task.

In sum it's an approach that doesn’t require an uC if it might be inconvenient to do so. I would imagine there are still a few (perhaps not many) electronic hobbyists out there who don't have the expertise, inclination, or equipment to use a uC in their projects.