Ronedwards

Hey there folks....OK...guess the best way to present this is to start at a familiar point. I have a logic board- mostly logic gate chips- no matter whether TTL or CMOS (have power situation solved) ...bear with me a moment...I can pass a logic high from chip B to chip ZZ on the board by using a single wire from the output of the gate on B chip to the input of the gate on ZZ chip. The logic high needs no timing signals or such, merely high or lo ...now...suppose B chip were to be located on a different pc board than ZZ chip that was also electrically isolated. The two pc boards cannot share a common powergrid. I have tried doing this between two breadboards and cannot get it to work so I am assuming the two chips involved need to share common positive and negative power sources to both chips to enable a digital logic signal high or lo to be passed between the two chips. I need to do this with minimal circuitry (no processors or timing/sync signals available) and almost the only chips available are logic gate ic's. I would rather not have to use logic level relays as this application will need single signals going both ways in a very large number of situations.

kchriste

If you need total isolation and the speed is relatively slow, then you could use opto-isolators. How fast are these digital signals?

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Ronedwards

Hi and thanx for the reply .... OK... "how fast" from point of transmission to the point of reception .... wouldn't want it any slower than one second ... be happy w/quarter to half a sec ...... "how fast" in terms of frequency/duration .... low end long enough to trigger a gate or latch or whatever ... upper end could be 25 days .....(to remain 'triggered') btw, this is for a very complex robotics project but the concept I'm after will be applied elsewhere in other projects so thats why its not posted in that subject .... also, almost all applications of this will be triggered (source to B gate) by mechanical switch (and therefore debounce circuits) or by a different gate locally and almost all 'receiving' gates or latches will be located up to 36 inches away maximum.

Papabravo

A couple of points. It may be possible for the two boards to share a common Ground ONLY. As long as the input(ZZ) can tolerate the voltage swing of the output(B) and the output(B) can maintain the proper threshold for the input(ZZ) then isolation may not be required.

Opto-isolators are inherently "slow" devices in electronic terms - not human terms. A typical part will have a delay on the order of 3-5 microseconds. This makes it unsuitable for any signal with a frequency in excess of 100 kHz. For example you would not be able to use an opto-isolator on a 4 MHz. clock signal that was going from one board to another.

A key parameter to look for in an opto-isolator is the Current Transfer Ratio or CTR. It has typical values in the range of 20% to 800% and it degrades with time and temperature.

Another gotcha is to provide for proper operation when the power supply for output(B) goes away and the power supply for input ZZ stays on. Then consider the opposite situation when ZZ's power goes away and B's power stays on.

You could be biting off more than you can chew. Just proceed with caution.

Ronedwards

I can deal with running a second line to make a common ground. I had started with TTL chips in mind but have changed to CMOS CD4000 series chips. Not sure how they would handle the output voltage swing from chip B. As far as the opto isolators go, cannot find data in my books on them but speed would not be at issue - all signal would be a single one-time pulse to trigger a latch or a pulse of extended duration. It would be more critical to have a single reliable continuous signal than a pulsed one.

kchriste

If you use a common ground between boards, you can couple the signals using transistors or logic ICs with open collector/drain outputs. With 4000 series chips, you could even use high value resistors ( 100K ) to connect the output of one IC to the input of another. For best noise immunity, you would put the resistor on the board that has the input IC and you'd place the resistor right at the input pin. That way you don't have to worry too much about one board not being powered and the signal lines trying to power the dead board via the CMOS input protection diodes. You still have to keep in mind the "default behavior" of the circuits when only one is powered down and the signal lines are dragged to ground.

If you can't use a common ground and decide to go the optoisolator route, here is an example of one with a open collector logic level output. You'll still need a current limiting resistor for the LED input:
http://www.fairchildsemi.com/ds/HC/HCPL-2601.pdf

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Ronedwards

Hmmmm... the signal reception board (eg:ZZ) would always be powered and most of the signal origin boards (eg:B) would be powered well before, during and after it was needed. With both boards powered by different power supplies I wouldn't be able to use a common ground line ... or have I missed something?
The idea of an opto iso device (got some data sheets also since last here) is appealing although the enable requirement (on one I saw) presents a problem. In most cases, the signal would be acting as a sensor signal but all it would do is change from Lo to Hi (and transiting between boards) but it will not be known WHEN the signal might be there.
Thanks for the link to the pdf .... will have a closer look at it later.

Ronedwards

Sorry ... maybe something I haven't been making very clear and it is rather unusual ..... the signal in question would be a single pulse of 'more than enough' duration to do the job required of it. In some cases it would be only enough to trigger a latch and in other applications of it the signal would remain fixed in the HI state for very extended periods.

kchriste

It really depends on the power supplies and what they are connected to already. As this is a robotics project, I assume the "power supplies" are batteries with maybe a regulator after them? I see no reason why you would need isolated supplies to start with, but then I haven't seen the schematic.

Optoisolators will be fine with either scenario. The only issue will be current consumption on the lines that "remain fixed in the HI state for very extended periods" since optoisolators typically draw 10ma when "on". You could reverse your logic on selected lines so that the optoisolators are OFF for the majority of the time to keep power consumption at a minimum.

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