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Old 11th April 2007, 01:47 AM   (permalink)
Arrow Designing a Analog to Digital Converter

Hi guys, as one of my school projects i am going to need to design a Analog to digital converter. Thew specification i have to follow are as follows:
1. 100khz max input frequency
2. max number of bits are 8
3. successive approximation type.
4. discrete device except counting and D/A return.

The device should be pretty basic in design and construction and cannot include and micro controllers or ICs other than the ttl74 and cmos 4000 series.

After doing some research, i was thinking of creating an oscillator for a clock and having the analog signal go to a 74191 up/down counter and feed that thru a R2R DAC for the comparator feedback. The output would also go to some kind of successive approximation register & parrallel to serial conversion.

Any ideas ? suggestions?

THhanks
Pete
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Old 11th April 2007, 01:58 AM   (permalink)
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Hi,

SAR ADC's generally turn on the MSB, then check the comparator, then leave this bit '1', or make it '0' depending on whether the DAC output is higher or lower than the input signal being measured. That can be pretty hard to do in basic logic (but not impossible). What you're doing is the basic 'counting' method, which is brute force, but is really simple and the same setup as SAR, with the only disadvantage being the varying sample time. A small voltage would be converted a lot quicker than a large one. However, you can simply set a counter to copy the counters contents after a certain fixed period, and then speed up the counters clock to decrease sample time. Strictly speaking, that isn't an SAR, will the powers that be let you get away with this?
Once you've waited the period it takes for the counter to go from 0, to 255 (maximum possible sampling time) then triggering a parallel to serial SR should be a snap. Although....that would require another counter (8-bit).

Perhaps you could make the 'ADC' a slave serial device? this means the result is clocked out by an external device, so all you have to do is load it in the shift register after its done, and make a 'done' line go high.

Sounds like everything else you've said, pretty much covers it, and I'm sure you know its not a true SAR ADC already.

I've had to do this with a CPLD, schematic entry, so I guess its virtually the same since the macro's we had to use were just virtual CMOS/TLL chips. You may end up with a fair few IC's on your board, but its easier than it looks.

Probably doesn't help, but it looks like you've got it down man.

Blueteeth

ps. And yes, AND do 'kick ass' apparently. Although I'm selling my soul to pentium.
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Last edited by Blueteeth; 11th April 2007 at 02:04 AM.
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Old 11th April 2007, 02:09 AM   (permalink)
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If i wanted to make it a true SAR type how would i do that ? More than likely if its not the correct type he wont like it..lol.

pete
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Old 11th April 2007, 02:31 AM   (permalink)
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Hi again,

I tend to over complicate things, so don't take this idea too seriously.

The simplest way I can think of uses a decade counter and a shift register. The shift register can be a serial to parallel type, or you could omit this altogether if you wish to have a serial output (you'll still need a single 'buffer D-type flip flop for the outpu, and a clock for the serial line, more on that later).

Basically, the output of your comparator, is the input to the shift register. Using the decade counter (driven by a clock) with its output connected to your R2R DAC, it will turn on each 'bit' consecutively. If its too high your comparator will tell you, (depending on how you configure it) say a 0 is 'too high' and a '1' is too low. So, you send a clock pulse to the decade counter (4017?), then clock in the output of the comparator into the shift register. You could use the same clock, but invert it for the SR so it clocks in a bit on the falling edge, whereas the counter will clock on the rising........with me so far?

Now, you would need to make sure that if a 'bit' is giving 'too low' as its reading, that it stays on (1), or if its too high, then it turns off (0) after checking each bit. You could use latches for this, although these would need a clock as well.

As your decade counter does its thang, your shift register will fill up with each bit, a '1' for too low, and a '0' for too high. After 8 clock pulses (for 8-bit resolution) you'll have your 8-bit result stored in the SR

Hmm I just winged that and its seems even simpler than the original idea, even at 3am. Its hazey, and not complete, as you must make sure that each bit of the input to the DAC remains '1' if the output of the comparator is 'too low'. You *may* be able to do this using another shift register, I'll think about it tomorrow.

Good luck, I need sleep.

Blueteeth
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Old 14th April 2007, 08:00 PM   (permalink)
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Thanks blueteeth for your suggestions, always appreciated.

After some more research and discussion with my professor it seems that i may use a DAC chip since the goal here primarly is the AD part. I believe this might work: Analog input through a comparator thru a 8 bit successive approximation register (maybe 74ls503) and back to the comparator thru a DAC chip. To output the digital signal i will need some kind of parrallel to series conversion (chip suggestions ?), i am not sure if i will need a latch/flip flop with this ?

So will this work ?

Also i need to build the comparator any circuit ideas or diagrams ?

THanks
peter
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Old 14th April 2007, 08:47 PM   (permalink)
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lol didn't even know the 503 existed, that makes life a hell of a lot easier, I was thinking all with basic logic :S

parallel to serial, I'd say the 74HC165. It has a 'load' line, and a clock to clock out the data, pretty simple, and it works like a charm. there are many of these though. You can look on wikipedia for a lsit of 7400 series and 4000 CMOS series chips and their function. Plenty of paralle to serial SR's there.

Blueteeth
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Old 14th April 2007, 09:06 PM   (permalink)
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Do you realy need to build the comparator from discrete transistors?

Can't you use an IC like the LM311?
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Old 14th April 2007, 09:40 PM   (permalink)
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Could use 2 counters and comparators. One counting up the other counting down. The one which triggers first is the one with the digital value you want.
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Old 15th April 2007, 01:10 AM   (permalink)
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Comparator: Lm393. Cheap, simple........or.you could use an opamp. I seriously doubt they want you to design a comparator from scratch, and if they did, they certainly wouldn't let you use any other 'IC's'.

Seriously, the 'comparator' part is probably by far the simplest

BT
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Old 16th April 2007, 06:29 AM   (permalink)
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Well guys i asked, my limitations are:
1. Cant use Micro controllers.
2. Can only use 74 series IC and some CMOS chips.

So i cant use any op ams or comparator chips ? Would a transistor based differential amp work ?

pete
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Old 16th April 2007, 12:30 PM   (permalink)
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Quote:
Originally Posted by amdkicksass
1. Cant use Micro controllers.

noooo, o well, good luck
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Old 17th April 2007, 01:03 AM   (permalink)
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LM311 and LM393 are waay too slow for this. If the input frequency is 100 KHz, then the Nyquist rate is 200 KHz. An 8-bit SAR needs a comparator that settles in less than 1/10th of that (preferably 1/20). So, the comparator needs to settle in 250-500 nanoseconds.
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Old 18th April 2007, 11:43 PM   (permalink)
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Well thanks for that bit of info but regardless i cant use those chips anyway. I have to build the comparator, any suggestions ?

pete
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Old 19th April 2007, 09:23 PM   (permalink)
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Quote:
Originally Posted by amdkicksass
Well thanks for that bit of info but regardless i cant use those chips anyway. I have to build the comparator, any suggestions ?
Either the question is far too vague, or you haven't given it all? - as it stands, it's like trying to it with a blindfold and handcuffs on!.
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Old 20th April 2007, 01:33 PM   (permalink)
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Could you get your instructor to explain how one may do analog to digital conversion without a vlotage comparator?
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