Calculate pullup and pulldown resistors for CMOS - Electronic Circuits Projects Diagrams Free

ghall426 · 19th December 2006, 06:02 PM

When using pull up and pull down resistors, how do I calculate the value I need? I know most people randomly use a 10k or something, but I'm interested in how to actually calculate the required value.

The specific chip I'm using is a 4518 BCD counter. Here is the datasheet:
http://focus.ti.com/lit/ds/symlink/cd4518b.pdf

Page 2 of the datasheet shows the input current, but which value do I want to use? And what do I need to use for V? I understand Ohm's law, just a little confused on which numbers to pull off the sheets.

I would appreciate some help to calculate, for example, a proper resistor value for BOTH a pullup and pulldown configuration for the input pins.

Thanks.

Greg

**Nigel Goodwin** · 20th December 2006, 08:34 AM

As you already seem to know?, there's no need to calculate a value - just choose one you 'like'.

If (for some bizarre reason) you want to calculate a value, simply decide what current you want and apply ohms law.

There's no value in the datasheet because no such value exists - it will probably specify minimum and maximum currents?, and you simply choose a value somewhere inbetween them - the acceptable range will be absolutely HUGE!!!.

Sceadwian · 20th December 2006, 01:24 PM

You basically just make sure that the pulldown isn't so strong (low value) that when the logic state changes the voltage goes high enough, or the opposite with a pullup, make sure the logic channel that has to pull that pullup to ground will be able to sink enough of the current for the voltage to drop to acceptable levels. 5k 10k 50k it really is pretty arbitrary. Higher values are going to be easier (and faster) to drive, but more susceptable to noise. Lower values are going to consume more power (important for battery applications)

Hero999 · 20th December 2006, 05:17 PM

I wouldn't say that higher values are faster because the RC time constant formed with the gate's capacitive input will be larger. Use low values for speed and high values to save power.

**Nigel Goodwin** · 20th December 2006, 06:12 PM

Quote:

Originally Posted by Hero999

I wouldn't say that higher values are faster because the RC time constant formed with the gate's capacitive input will be larger. Use low values for speed and high values to save power.

I would agree!.

Sceadwian · 21st December 2006, 12:19 AM

My appoligizes, not sure what I was thinking. I think I said "pulldown the pullup" and "pullup the pulldown" in my head a few too many times and got myself turned around =)

19th December 2006, 06:02 PM	(permalink)
ghall426 New Member	Calculate pullup and pulldown resistors for CMOS When using pull up and pull down resistors, how do I calculate the value I need? I know most people randomly use a 10k or something, but I'm interested in how to actually calculate the required value. The specific chip I'm using is a 4518 BCD counter. Here is the datasheet: http://focus.ti.com/lit/ds/symlink/cd4518b.pdf Page 2 of the datasheet shows the input current, but which value do I want to use? And what do I need to use for V? I understand Ohm's law, just a little confused on which numbers to pull off the sheets. I would appreciate some help to calculate, for example, a proper resistor value for BOTH a pullup and pulldown configuration for the input pins. Thanks. Greg

20th December 2006, 08:34 AM	(permalink)
Nigel Goodwin Super Moderator	As you already seem to know?, there's no need to calculate a value - just choose one you 'like'. If (for some bizarre reason) you want to calculate a value, simply decide what current you want and apply ohms law. There's no value in the datasheet because no such value exists - it will probably specify minimum and maximum currents?, and you simply choose a value somewhere inbetween them - the acceptable range will be absolutely HUGE!!!. __________________ PIC programmer software, and PIC Tutorials at: http://www.winpicprog.co.uk

20th December 2006, 01:24 PM	(permalink)
Sceadwian Experienced Member Blog Entries: 1	You basically just make sure that the pulldown isn't so strong (low value) that when the logic state changes the voltage goes high enough, or the opposite with a pullup, make sure the logic channel that has to pull that pullup to ground will be able to sink enough of the current for the voltage to drop to acceptable levels. 5k 10k 50k it really is pretty arbitrary. Higher values are going to be easier (and faster) to drive, but more susceptable to noise. Lower values are going to consume more power (important for battery applications) __________________ Curiosity killed the cat; That's why they have nine lives.

20th December 2006, 05:17 PM	(permalink)
Hero999 Experienced Member	I wouldn't say that higher values are faster because the RC time constant formed with the gate's capacitive input will be larger. Use low values for speed and high values to save power. __________________ What's so bad about Microsoft? Get Opera it's simply a superb browser.

21st December 2006, 12:19 AM	(permalink)
Sceadwian Experienced Member Blog Entries: 1	My appoligizes, not sure what I was thinking. I think I said "pulldown the pullup" and "pullup the pulldown" in my head a few too many times and got myself turned around =) __________________ Curiosity killed the cat; That's why they have nine lives.

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