Decimator/bit crusher effect - Electronic Circuits Projects Diagrams Free

Dr.EM · 26th August 2006, 08:48 PM

I would like to make one of these effects. They allow you to lower bit rates and alter sampling frequencies of an incoming signal for "lo-fi" type effects. My plan is to use an 8-bit ADC chip, giving a maximum of 8-bit resolution. To alter the bit rate down, I intend to be able to switch out the LSB's with 4066 CMOS switches, I think this would achieve the right effect?

To alter the sampling frequency I plan to have a set of latches on the digital outputs (the 4516 chip using the parellel load feature) which are latched by a variable frequency oscillator. By lowering the oscillator frequency, the number of samples passed per second can be reduced?

The only ADC chip I can get easily is the ADC0804LCN. It seems to be designed to be used with microprocessors, which I don't intend. Is it suitable? Also, the conversion time is a little long at under 100uS, I hope it is under it by a bit, but it shouldn't matter too much.

Looking at the datasheet, page 11's free running connection looks suitable? It generally looks a bit of a hassle to hook up (seperate grounds for analogue and digital?), is there much chance of getting one working (and a breadboard test is required too).

hjames · 28th August 2006, 02:39 PM

I don't do much audio stuff, so it took a while to search for the context. The bit-rate thing should be fine, it's just that 8 bits isn't exactly a lot of headroom to start with and lowering it from there is just going to make it sound even noisier. - Is there any way of simulating this stuff on the computer? I'd assume that there's some sample rate converter that will convert normal quality sound into something that's 8bit/10KHz. As far as I remember though, 8 bit sound is typically put through a compander so that the quieter sounds don't get lost - as it is, I'd guess it's going to sound worse than telephone quality (without the effects)...

The 4516 would let you divide the frequency by 1..15, so it would work if you can feed in a ~10KHz signal.

That mode of the ADC0804 should work, just keep an eye out for the note about the WR pin needing an initial pulse when the ADC is starting up. Alternatively, feed the carry-out of the 4516 into the WR pin and use that to start the conversion.

In order to get the lowest noise, the chip has multiple grounds so that it can isolate the noisy high-speed bus from the analog section. Just connect both of them up to the common ground line.

Dr.EM · 28th August 2006, 03:11 PM

Thanks for the reply. I've tried twice to draw up schematics and given up both times

Hadn't thought too much about noise, but that could get a bit excessive. The effect is "grungey", but I don't really disire noise. It kind of simulates old computer sound quality, but is fully variable. I like the way it sounds on drums, snares in particular, it's "crispy"

. I do have a computer one, VST job, but I want a real one for the "hands on" feel.

The use of the 4516 isn't quite standard. What i'm doing is using thier parellel load feature, they are essentially latches (I may use latches instead, but am familiar with the 4516). By applying pulses to the PL input, the numbers at the input are send out and held until the next pulse, upon which the current number is once again sent to the output and held. By altering the oscillator speed of the pulse source, it is effectively possible to lower the sampling rate? The half drawn schematic may make it clearer (there should be a hpf and schmitt to shorten the 555 output pulses and assume the 555 freq is variable).

I'm not certain I will persue this anyway, it looks a bit of a tricky one to get going and may be dissapointing. What I need is to buy the ADC and experiment on breadboard before buying the case, controls etc, but that way I pay extra postge which annoys me.

I will also require op-amps as buffers and amplifiers on the inputs and outputs and for the R2 DAC. If the chip uses a 5v supply, how should I power the op-amps? Low voltage ones, or run them off of higher voltage and use capacitive coupling? The chip seems to be protected against overvoltage to some degree. The intended power supply is a 12VAC (or 9vac) wall pack with the power supply systems internal.

hjames · 28th August 2006, 03:31 PM

I was thinking more about quantization noise, but as long as you've simulated this out, that's fine. I think you'll definitely want an adjustable gain on the input in addition to a volume control at the output though.

Oh I see, I thought you wanted to use them as a clock divider... Well, if that's your worry, then you don't even need the 4516's - the ADC has a built in latch that holds the value between conversions. Just start the conversions at whatever rate you want (i.e. fed by the adjustable 555), and just use the D0-D7 pins as is, masking out the lower bits as you see fit.

Capacitive coupling is probably the way to go - have the input and output stages use whatever components you're comfortable with (I have a tendency to use the latest and greatest parts, but costs of the custom boards means I don't build projects too often), and AC couple/divide the signal into the 0-5V range of the ADC (centered around 2.5V), and do the same on the output.

Dr.EM · 28th August 2006, 04:03 PM

Thats good, I can save some board space and effort that way

. What pin will I need to supply the variable clock to though?

I mainly intended on having the level adjustment on the input, possibly on the output too, but the mixer it will be connected to can deal with that probably. Just a simple op-amp amplifier with variable feedback I was thinking.

I would probably have the op-amp on a seperate 12v regulated supply with a potential divider giving a 6v reference/artificial ground, then another voltage divider at the output into the ADC so that the maximum voltage is 5v; although using the artificial 6v reference, I probably need capacitive coupling too? Capacitive coupling on the input too I would think.

My sim would crash and burn simulating anything more complex than a light bulb, so i'll need to do a lot of breadboarding if I do this (probably get 2 ADCs, I can see myself breaking one). Nothing here is too high frequency for breadboard is it? I should learn a bit about ADCs if nothing else!

**Nigel Goodwin** · 28th August 2006, 04:26 PM

Bear in mind you don't just require buffers on the input and output, you require low-pass filters as well - choose your low-pass filters to be at least 1/3 the sampling frequency, preferably even lower. As you're not doing any processing the sampling frequency can be fairly high anyway, mainly limited by the speed of the A2D.

Dr.EM · 28th August 2006, 05:11 PM

Yeah, I had thought of that, I have a LPF, HPF section on a block diagram a drew. The HPF will likely be taken care of by any capacitive coupling, it's just to remove the DC. I'm still not sure how I set the sampling frequency of that ADC though? Is it via the clock pin, I use an external clock? 10Khz is quite low, and a filter 1/3 of that is a bit too low so hopefully the ADC can run a bit faster if pushed?

Dr.EM · 28th August 2006, 09:43 PM

It looks like it might reach 16Khz if the clock is ran at 1.2Mhz and the chip is supplied from 6V. Is it the clock speed I change to alter the sampling frequency though? It lists a minimum on the datasheet of 100khz, will it fail to work below this? I want to be able to take it under 1khz sampling rate really

, 100k seems to equate to 1.3k or so (might be alright)

hjames · 29th August 2006, 06:24 AM

Well, the datasheet from Natl. Semi. says that accuracy is guaranteed at sampling frequencies of 10KHz and below, but running it faster makes you lose bits... Thats the effect you wanted anyway isn't it ? *grin*.

When this particular ADC sees a low signal on it's "/WR" pin, it will go into a reset state, and when the pin goes back high, it will start a conversion. Just supply a 10KHz pulse stream with a negative pulse width of >100nsec (but as narrow as possible) into this pin.

Dr.EM · 29th August 2006, 09:41 AM

Ah, good. Didn't like to mess with the clock too much. So I will fix the clock at mabye 800khz, whatever I can get away with

The /wr pin is is tied to the /intr pin on the free running mode, I assume I reset them both with the 555 clocking system? And just by varying a 555 frequency, I can effectively change the sampling rate? I'm not certain if that can work. As the /wr pin forces a reset state, say i supplied a low 2khz pulse stream, it wouldn't take 2000samples/s, rather it would be reset 2000 times/s and between each reset will take as many samples as dictated by the clock (mabye 5 in this case)? So it will try to take it's full 10000 samples, but will keep being interupted. Mabye i'm missing something.

Thanks for all your help so far btw, I think I understand it all a bit better now

hjames · 29th August 2006, 06:11 PM

Well, if you supply the sampling clock, it's no longer running in "free-running" mode - leave the /intr line open, and just connect the /wr line to the 555. That'll make it take 1 sample/conversion per cycle. The 555 runs at 2KHz, you'll get a 2KHz sampling rate. After the ADC has done it's conversions it'll just sit there waiting for the next /wr pulse.

Dr.EM · 29th August 2006, 09:03 PM

Ah, excellent, I don't fully understand what all the pins do

. So just feed a fixed clock and use /wr to control the sampling rate. /intr is left unconnected. I have a breadboarded CMOS 7555 clock which I can vary from 50khz to 1Mhz, but I probably shan't use it, except mabye to determine the highest operation freq of my chip. I can use the internal clocking scheme.

Dr.EM · 2nd November 2006, 04:20 PM

Hello again. I'm having more thoughts about this, and the op-amps. Do you think it would be more suitable to use this:

http://www.rapidonline.com/productin...moduleno=34441

TLC27L4CN

Since it runs from 5v and being CMOS is presumably rail to rail? It should make things easier, providing it is suitable for audio (low noise, distortion?). I would only require a 5v (probably 5.8 in fact) supply altogether if these would work and don't need to worry about clipping signals into the ADC etc so much.

A high (over VDD) signal input voltage wouldn't damage these op-amps would it? I guess protection diodes could be used if there were a chance of it.

Also, how would you connect the input signal, since the op-amp is single supply, connecting between ground and the input would leave a half wave signal. Capacitive coupling, reference the negative input to half supply?

Dr.EM · 4th November 2006, 01:46 PM

Ok, heres a schematic; I finally decided to do it

- The input is capacitively coupled, this will pass the full signal with a single supply? It seems to in guitar FX pedals, or does the + input of the inverting amp need to go to 1/2 of V+? Gain can be adjusted with the feedback pot to suit different inputs.

- The sampling rate of the ADC is controlled by the 555 oscillator. It produces short negative pulses required by going through a high pass filter and inverting schmitt trigger (40106 fast enough?). I will find the values for the filter with the scope.

- I want the ADC to run at 750Khz, so need suitable R and C values to do this.

- At the DAC, bits can be discrarded by switching on 4066 bilateral switches (or ordinary MOSFETS?) which ground the 3 LSB's when activated. The 10k resistors stop this presenting a short at the output of the ADC. The switches are activated from a set of comparators controlled by a pot. (oops, the side with all the switches connected should go to 0v)

- A low-pass filter and high pass filter (should be around 6K and 30Hz respectively) are used at the output to remove unwanted harmonics/DC.

As noted, the op-amps are CMOS TLC27L4 which can run from only 5v single supply. I hope these are suitable? Comparators are LM339. The 5.8 supply is higher than 5v to allow the ADC to run a little faster; it will be a fully regulated supply. I haven't shown the parallel digital connection between the ADC and DAC for neatness. Hand drawn since my software doesn't have half the parts and I find it slow to use tbh.

hjames · 5th November 2006, 06:58 AM

The opamps need to be tied to some virtual ground at VCC/2. AC coupling should be fine. I'll let you dig through the ADC data sheet

. The TLC27L4 might not be the best choice - the GBW is pretty low, and it seems to be more meant for instrumentation applications - it seems to be the low power variant of the more common TLC274. If you dig around TI's website you can see all the recent variants of it. In any case, it does use a standard pinout, so later on you can just swap the chip out if it becomes a problem.

Incidentally, about the 4066 switches - the four things you can do with the bits are short the DAC bits to VCC, GND, VCC/2, or just open circuit them. This corresponds to rounding the numbers up, down, towards '0', and truncation (?dunno about the last one). There shouldn't be any difference between the first two, and the last one, but there is a minor difference if you short the DAC lines to VCC/2. I don't know which one you'd like to do though.

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26th August 2006, 08:48 PM	(permalink)
Dr.EM	Decimator/bit crusher effect I would like to make one of these effects. They allow you to lower bit rates and alter sampling frequencies of an incoming signal for "lo-fi" type effects. My plan is to use an 8-bit ADC chip, giving a maximum of 8-bit resolution. To alter the bit rate down, I intend to be able to switch out the LSB's with 4066 CMOS switches, I think this would achieve the right effect? To alter the sampling frequency I plan to have a set of latches on the digital outputs (the 4516 chip using the parellel load feature) which are latched by a variable frequency oscillator. By lowering the oscillator frequency, the number of samples passed per second can be reduced? The only ADC chip I can get easily is the ADC0804LCN. It seems to be designed to be used with microprocessors, which I don't intend. Is it suitable? Also, the conversion time is a little long at under 100uS, I hope it is under it by a bit, but it shouldn't matter too much. Looking at the datasheet, page 11's free running connection looks suitable? It generally looks a bit of a hassle to hook up (seperate grounds for analogue and digital?), is there much chance of getting one working (and a breadboard test is required too). __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess...

28th August 2006, 02:39 PM	(permalink)
hjames	I don't do much audio stuff, so it took a while to search for the context. The bit-rate thing should be fine, it's just that 8 bits isn't exactly a lot of headroom to start with and lowering it from there is just going to make it sound even noisier. - Is there any way of simulating this stuff on the computer? I'd assume that there's some sample rate converter that will convert normal quality sound into something that's 8bit/10KHz. As far as I remember though, 8 bit sound is typically put through a compander so that the quieter sounds don't get lost - as it is, I'd guess it's going to sound worse than telephone quality (without the effects)... The 4516 would let you divide the frequency by 1..15, so it would work if you can feed in a ~10KHz signal. That mode of the ADC0804 should work, just keep an eye out for the note about the WR pin needing an initial pulse when the ADC is starting up. Alternatively, feed the carry-out of the 4516 into the WR pin and use that to start the conversion. In order to get the lowest noise, the chip has multiple grounds so that it can isolate the noisy high-speed bus from the analog section. Just connect both of them up to the common ground line.

28th August 2006, 03:31 PM	(permalink)
hjames	I was thinking more about quantization noise, but as long as you've simulated this out, that's fine. I think you'll definitely want an adjustable gain on the input in addition to a volume control at the output though. Oh I see, I thought you wanted to use them as a clock divider... Well, if that's your worry, then you don't even need the 4516's - the ADC has a built in latch that holds the value between conversions. Just start the conversions at whatever rate you want (i.e. fed by the adjustable 555), and just use the D0-D7 pins as is, masking out the lower bits as you see fit. Capacitive coupling is probably the way to go - have the input and output stages use whatever components you're comfortable with (I have a tendency to use the latest and greatest parts, but costs of the custom boards means I don't build projects too often), and AC couple/divide the signal into the 0-5V range of the ADC (centered around 2.5V), and do the same on the output.

28th August 2006, 04:03 PM	(permalink)
Dr.EM	Thats good, I can save some board space and effort that way . What pin will I need to supply the variable clock to though? I mainly intended on having the level adjustment on the input, possibly on the output too, but the mixer it will be connected to can deal with that probably. Just a simple op-amp amplifier with variable feedback I was thinking. I would probably have the op-amp on a seperate 12v regulated supply with a potential divider giving a 6v reference/artificial ground, then another voltage divider at the output into the ADC so that the maximum voltage is 5v; although using the artificial 6v reference, I probably need capacitive coupling too? Capacitive coupling on the input too I would think. My sim would crash and burn simulating anything more complex than a light bulb, so i'll need to do a lot of breadboarding if I do this (probably get 2 ADCs, I can see myself breaking one). Nothing here is too high frequency for breadboard is it? I should learn a bit about ADCs if nothing else! __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess... Last edited by Dr.EM; 28th August 2006 at 04:05 PM.

28th August 2006, 04:26 PM	(permalink)
Nigel Goodwin	Bear in mind you don't just require buffers on the input and output, you require low-pass filters as well - choose your low-pass filters to be at least 1/3 the sampling frequency, preferably even lower. As you're not doing any processing the sampling frequency can be fairly high anyway, mainly limited by the speed of the A2D. __________________ PIC programmer software, and PIC Tutorials at: http://www.winpicprog.co.uk

28th August 2006, 05:11 PM	(permalink)
Dr.EM	Yeah, I had thought of that, I have a LPF, HPF section on a block diagram a drew. The HPF will likely be taken care of by any capacitive coupling, it's just to remove the DC. I'm still not sure how I set the sampling frequency of that ADC though? Is it via the clock pin, I use an external clock? 10Khz is quite low, and a filter 1/3 of that is a bit too low so hopefully the ADC can run a bit faster if pushed? __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess...

28th August 2006, 09:43 PM	(permalink)
Dr.EM	It looks like it might reach 16Khz if the clock is ran at 1.2Mhz and the chip is supplied from 6V. Is it the clock speed I change to alter the sampling frequency though? It lists a minimum on the datasheet of 100khz, will it fail to work below this? I want to be able to take it under 1khz sampling rate really , 100k seems to equate to 1.3k or so (might be alright) __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess...

29th August 2006, 06:24 AM	(permalink)
hjames	Well, the datasheet from Natl. Semi. says that accuracy is guaranteed at sampling frequencies of 10KHz and below, but running it faster makes you lose bits... Thats the effect you wanted anyway isn't it ? grin. When this particular ADC sees a low signal on it's "/WR" pin, it will go into a reset state, and when the pin goes back high, it will start a conversion. Just supply a 10KHz pulse stream with a negative pulse width of >100nsec (but as narrow as possible) into this pin.

29th August 2006, 09:41 AM	(permalink)
Dr.EM	Ah, good. Didn't like to mess with the clock too much. So I will fix the clock at mabye 800khz, whatever I can get away with The /wr pin is is tied to the /intr pin on the free running mode, I assume I reset them both with the 555 clocking system? And just by varying a 555 frequency, I can effectively change the sampling rate? I'm not certain if that can work. As the /wr pin forces a reset state, say i supplied a low 2khz pulse stream, it wouldn't take 2000samples/s, rather it would be reset 2000 times/s and between each reset will take as many samples as dictated by the clock (mabye 5 in this case)? So it will try to take it's full 10000 samples, but will keep being interupted. Mabye i'm missing something. Thanks for all your help so far btw, I think I understand it all a bit better now __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess...

29th August 2006, 06:11 PM	(permalink)
hjames	Well, if you supply the sampling clock, it's no longer running in "free-running" mode - leave the /intr line open, and just connect the /wr line to the 555. That'll make it take 1 sample/conversion per cycle. The 555 runs at 2KHz, you'll get a 2KHz sampling rate. After the ADC has done it's conversions it'll just sit there waiting for the next /wr pulse.

29th August 2006, 09:03 PM	(permalink)
Dr.EM	Ah, excellent, I don't fully understand what all the pins do . So just feed a fixed clock and use /wr to control the sampling rate. /intr is left unconnected. I have a breadboarded CMOS 7555 clock which I can vary from 50khz to 1Mhz, but I probably shan't use it, except mabye to determine the highest operation freq of my chip. I can use the internal clocking scheme. __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess... Last edited by Dr.EM; 29th August 2006 at 09:12 PM.

2nd November 2006, 04:20 PM	(permalink)
Dr.EM	Hello again. I'm having more thoughts about this, and the op-amps. Do you think it would be more suitable to use this: http://www.rapidonline.com/productin...moduleno=34441 TLC27L4CN Since it runs from 5v and being CMOS is presumably rail to rail? It should make things easier, providing it is suitable for audio (low noise, distortion?). I would only require a 5v (probably 5.8 in fact) supply altogether if these would work and don't need to worry about clipping signals into the ADC etc so much. A high (over VDD) signal input voltage wouldn't damage these op-amps would it? I guess protection diodes could be used if there were a chance of it. Also, how would you connect the input signal, since the op-amp is single supply, connecting between ground and the input would leave a half wave signal. Capacitive coupling, reference the negative input to half supply? __________________ Angry!? I'm absolutely electrolytic! Will have to make do with myspace now I guess...

5th November 2006, 06:58 AM	(permalink)
hjames	The opamps need to be tied to some virtual ground at VCC/2. AC coupling should be fine. I'll let you dig through the ADC data sheet . The TLC27L4 might not be the best choice - the GBW is pretty low, and it seems to be more meant for instrumentation applications - it seems to be the low power variant of the more common TLC274. If you dig around TI's website you can see all the recent variants of it. In any case, it does use a standard pinout, so later on you can just swap the chip out if it becomes a problem. Incidentally, about the 4066 switches - the four things you can do with the bits are short the DAC bits to VCC, GND, VCC/2, or just open circuit them. This corresponds to rounding the numbers up, down, towards '0', and truncation (?dunno about the last one). There shouldn't be any difference between the first two, and the last one, but there is a minor difference if you short the DAC lines to VCC/2. I don't know which one you'd like to do though.