I have a 4017 rigged so that i can give it a clock pulse, and it moves between outputs 0 and 1, then resets, so it can only be outputting at 0 or 1 at any given time basically. Vcc is 5.2 V. Output 0 starts high, then when I clock it, it doesnt fall low and 1 doesnt go high. Instead 0 goes to 4.67, and 1 stays low. Then I clock it again, 0 goes to 5.2 and 1 stays low. Does anyone know why the outputs are not cycling correctly? This circuit worked perfectly on the proto board, and when I soldered it together, it behaves weirdly. All solder connections are correct, and all components are tested and work fine. Also, resistors and tying down the correct pins.
Thank you for any help

 

Where is the reset ?

 

The reset is pin15. It is tied low and to output 2. This way, it will be low until triggered high by the third output (output 2), and force the counter back to output 0.

 

:x does anyone have any idea what im talking about? i have a cmos outputting at an indeterminate state. why is this happening :evil:

 

Post a schematic so we can see what you're describing.

 

i don't understand why you tied low the reset?
the outpt of the 4017 is L when not H, it is not floating, so you need to use a resistor to gnd. i am not sure i understand what you actually diddid you use Q2(the third output) to reset? or you used Q1 wich is the second output?
please, a schematic will be great!!

 

I tied the reset low and to Q2. This way it won't do anything until Q2 resets it. I hope this clarifies. On the proto board I had Q0 and enable tied together and to ground throught the same resistor and it worked. I did the same thing on the circuit board.

 

from what i understand you have connected your circuit as a flip flop.
but why do you did you connect Q0 and enable together and to gnd?
really, a schematic could do a lot better

 

You have shorted the Q2 output to ground. Q2 cannot drive the reset if you have it shorted to ground. Ground is zero volts. Period. Shorting an output to ground could possibly cause unexplained behavior in other parts of the chip.
If you want to initialize the counter to zero count when you turn on power, post that fact here and we'll show you how to do it.

 

well, Ron H, you said it yourself in the quote. he tied them together and with a resistor to gnd. now the resistor should be a few KOhms, is it is small, it will be just as you say, a short to gnd.

 

Yeah, if he tied them to gnd through a resistor, he might be OK, as you say, if the resistor is a few Kohms. I got the impression that he had tied Q2 directly to ground.

 

Nothing is shorted to ground. Theyre tied to ground through resistors in the Kohms. Yes I have it working as a flip flop.

One sate should be: Q0=5.2V, Q1=0V, the other state should be Q0=0V, Q1=5.2V.

However it behaves as follows: state one Q0=5.2V, Q1=0V, state two Q0=4.67V, Q1=0.

To my understanding, if the clock and enable pins are tied low through the same resistor, and the same high pulse is given to the clock pin and the enable pin, the counter will advance. This is how I have wired it on the protoboard when it worked.

I don't believe the issue is with the reset or enable, because the counter IS toggling between two distinct states. The problem is that one of these states is not the one I want :? :!:

 

Batman, you say you are using a resistor of 'a few K' from Q2 to ground. You should need no resistor at all because CMOS devices have complentary (push-pull) outputs. If your resistor is only 1K or so, you are loading Q2 excessively.

Connect as follows. + and -ve rails to pins 16 and 8. Pin 13 (CE) to ground. Pin 14 (CLK) as input. Pin 15 (RES) to pin4 (Q2). Make all connections direct (ie not using resistors). Those are all the interconnects you require.

Take outputs from Q0 and Q1.

 

well, i see the problem now.
enable is active LOW, so when you tied it with the clock, you have the circuit disabled when you get a pulse.

 

I have heard contradictory statements from different people in this forum:

1) the resistor should be a few KOhms

2) You should need no resistor at all

I wired it exactly how pebe described. I'm still getting the 4.67 state instead of 0. Any other ideas?