eeglp

How to design a low output impedance high swing low consumption power output stage.
I use the output stage which is described in the attachment .If I want to get lower output impedance, I have to increase the current,but it will increase power.And the swing is also not very high.How to improve it.

Attached Images

untitled_187.jpg (241.2 KB, 318 views)

Chippie

Looks to me like its a mosfet output stage with complimentary mosfets ?


Maximum efficiency is going to be down to the RdsON of the mosfets......

since this is where the losses will occur....

and the maximum output voltage swing is going to be dependant on supply voltage and mosfet characteristics as previously stated......The power supply must of course be able to sustain the demands made by the output stage.....
So, ignoring the power supply for the moment, the answer is to select mosfets whose RdsON is a minimum.....best done by checking the manufacturers data sheets as RdsON is dependant on Gate voltage, within given limits of course 8)

eeglp

I have some probems about my design.
Do you think it is reasonable for following requiring:
Parameters Specifications
Supply Voltage +/- 1.0 V
Power Consumption < 500 uW
Low-frequency Gain A0 30 - 50 dB
Maximum Gain Variation
*( 0 < f < 20MHz, 0oC < T < 80oC) < +/- 1 dB
Unity-Gain Frequency f0 ³ 200 MHz
Differential Output Swing > +/- 1.2 V
DC output voltage (Single-Ended) 0 V +/- 50 mV
Slew Rate SR ³ 10 V/ms
Phase Margin PM ³ 60o
CMRR ³ 60 dB
PSRR
³ 50 dB at dc
³ 40 dB at 50 KHz
Equivalent Input Noise < 8 nV / Hz1/2
Input Offset Voltage < 50 mV
load capacitance 1pf

two input and two output variable-gain amplifier.
I use four or five stage differential amplifier using diode connected active load to realize.it will be shown below.So phase margin and output stage become the key point.I just use the output stage which are shown before to realize my design.For such output stage ,I have to make the output impedance lower to meet +/-1dB (0 < f < 20MHz).However such strcture have a problem out swing.source follow can reduce output impedance,but also have problem about swing.cascode folder have high swing,but it has high output impedance.if I improve current,the output impedance will reduce,but it will increase power consumption.for such design still can't meet the specifications shown before. I also want to use pole-zero compensation to realize it.But it will affect the phase margin

Attached Images

2_639.jpg (233.6 KB, 283 views)

Chippie

What are you trying to build/do ? exactly........a little more info would help

eeglp

I use 3 diode connected active load amplifier shown before as low gain stage.I use three of them to build the total amplifier.It's power consume is
about 60uw for one stage.I also use another gain variable amplifier to make the whole amplifier to vary the gain.And the output stage which was shown in Figure 3(the output stage).The reasons are described as below:
(1)for such condition Maximum Gain Variation *( 0 < f < 20MHz, 0oC < T < 80oC) < +/- 1 dB ,I have to let the output impedance small so that the amplifier can meet it.As we all know,Usually W3db=1/(2*pi*Rout Cload),in
order to improve W3db,Rout have to be reduced.So output stage such as cascode folder structure cann't use ,gain boost technology also cann't meet the design.connected active load amplifier can meet high w3db and unity gain frequency,though it's gain is smaller.Am I right?but there are also some problems. Because multiple stage amplifer, I have to make every stage stable,that's means phase margin should large than 60 which is required in design.The main problem maybe in the output stage.As I am described before, my output stage still can not meet the design.Such output stage the output resistance =1/gm=(vgs-vth)/2Id, for w3db=1/(2*pi*Rout Cload)>20M,cload=1pf, Routshoud<7.9577k,it just for 3db.for 1 db, rout=5k.if r=5k, vgs-vth=0.5v(Becuse the dc output should equal=0).Id>=50u, idtotal=100ua,the power should larger than 200uw.According to my simulation let Id=50u,still can't meet w1db=20M,If I improve the power I can meet but It will large than 500uw.Using such output stage the swing still can't meet the design.
Am I right.Thanks