Here's a simple PWM control circuit using inexpensive readily-available components.
The circuit component values shown are for a 12V supply but could be altered for other supply voltages less than 15V.
Most of the work is done by a CD40106 hex Schmitt inverter IC.
U1a/R1/C3 form an oscillator running at ~22kHz. Its square-wave output is integrated by R2/C4 to give an approximation of a triangular wave. This wave is summed at the input of gate U1b with a control voltage in the range 0-12V, by means of weighting resistors R3/R4. As the sum goes alternately above the upper Schmitt threshold then below the lower Schmitt threshold of U1b the output of U1b provides pulses of width dependent on the control voltage. These pulses are inverted by paralleled gates U1c-U1f which together have enough current drive for transistors Q1 and Q2. Q1 and Q2 toggle alternately and provide a low-impedance drive for the gate of NMOS FET M1, which switches the load on and off.
R3 determines the control voltage range over which PWM pulses are generated. For the circuit as shown a control voltage below ~0.5V results in the FET being permanently off. A control voltage in the range 0.5V-11.5V gives PWM pulses with a duty cycle ranging respectively from ~7% to 93%. Above 11.5V the control voltage results in the FET being permanently on. Because of the inherent hysteresis of the Schmitt gates it is not possible to get a PWM duty cycle range of 0%-100%.
C1/C2 are for supply decoupling.
Q1 and Q2 are general-purpose low power transistors, e.g. Q1 = 2N2222, 2N3904, BC337; Q2 = 2N2907, 2N3906, BC807.
The FET should be selected to handle (with a good margin) the maximum current of the load it is to drive. Examples are IRFH5306, BSC024NE2LS, STD95N04.
For lower supply voltages the duty cycle range is reduced. For example, with a 6V supply it is ~ 10%-90%.
If a full 0-100% duty cycle range is needed, U1b can be replaced by a non-Schmitt inverter, e.g. as in a CD4049B.
If the anticipated load is inductive (e.g. a DC motor) Schottky diodes rated for the load current will be needed on the FET stage to protect it against back-emfs generated when the load current is turned off.
If only light loads are to be used then U1d-f, Q2 (or Q1) and the FET can be omitted and U1c can be used to drive Q1 (or Q2) base via a series resistor (say 10k), Q1 (or Q2) being used to drive the load.
At present the PWM duty cycle increases as the control voltage increases. If it is required instead to reduce the duty cycle as the control voltage increases then U1b can be omitted.
Here is the .asc file for simulating circuit operation in LTSpice :-