23rd March 2012 06:04 PM
Does anybody have or would be kind enough to create a footprint for the Cinterion BGS2 value GPRS module?
It is an LGA arrangement and I am fine creating the device symbol, but I have no clue how to draw the footprint, I have read loads of tutorials and I just cant seem to line everything up etc. I am not even confident the pad sizes are correct, trouble is with through hole stuff I can print the footprint out and poke the legs through the holes and see if it is correct with some SMD stuff I can line it up, but LGA type stuff I can't see the pads as they are underneath the chip!
Any help appreciated!
I do have a datasheet somewhere I can send to someone if they are willing to help.
You can probably tell by the title but i'm attempting this in Eagle.
23rd March 2012 09:20 PM
Can you provide a link to a dimensioned drawing for the exact LGA that you need? Be sure it includes any heat sink areas.
23rd March 2012 10:41 PM
Many thanks for your reply, I have attached a datasheet, hope this would be sufficient.
23rd March 2012 11:01 PM
I should have asked before, are you using Eagle 5.11 (or any 5.xx) or 6.0/6.1? I assume there is backward compatibility, but there is no need to make it more complicated than needed. I have both versions.
Edit: One more detail. will the solder paste stencil be 150 micron or 110 micron thick? The pads at 110 micron are 2.36X0.7 mm and at 110 micron are 1.75X0.7 mm. The thicker stencil allows more solder paste, so adjustment is apparently made in the pad length. My guess is that a bigger pad with a thicker stencil might lead to shorts. (The only LGA similar type device I have done was an accelerometer that I hand soldered...it only had 8 pads.)
Last edited by jpanhalt; 23rd March 2012 at 11:31 PM.
24th March 2012 12:04 AM
I am using Eagle 6.1 free version.
I honestly don't know regarding the paste, there is a video from Cinterion on youtube of hand soldering the device, the PCB house I use normally deals with assembly work.
I guess the longer the pad the better for hand soldering with Cinterion's tinning method.
24th March 2012 12:48 AM
I have a draft with the shorter length. Changing to the longer length is not a problem. Notice the spacing around the RF pad is a little different. Again, that can be dealt with. I ended up using two grids (1.2 and 1.0) with a minimum of 0.05 to accommodate the RF pad. (I may change my mind on that depending on the "BIG" problem described below.)
There is one BIG problem, as best I can see it. The drawing is not fully dimensioned. The inner ground pads were easy to do, because the corner distance (i.e., C/L horizontal to C/L vertical) is shown. It is 2 mm. I cannot find any way to relate the vertical outer pads to the horizontal outer pads.
If you can find it (no guessing!), let me know. I was following the recommended pattern(s) in Figures 45 and 46. I just reread it. I will redo according to Figure 44, which is fully dimensioned, and leave the stencil until later.
Last edited by jpanhalt; 24th March 2012 at 01:00 AM.
Reason: found error
24th March 2012 01:42 AM
I am terrible at reading dimension drawings I get muddled with the numbers and which bit they are referring to!
I would really like to be able to create my own reliable footprints from the datasheets, but can't seem to find any good information on how to read the dimensions correctly, do you have any pointers?
I hadn't actually noticed the distance difference between the RF pad and the normal pads, is it 1.2 for normal and 1.35 for the RF pads? I guess those are in mm units?
What is the stencil for? Isn't that for the assembly part? Or is it to do with something else also?
What is the corner distance? I can see 2mm between the two centres of the inner ground pads on figure 44. Is that what you were referring to? I don't know what C/L is.
Is the spacing between horizontal and vertical 2.5mm? From centre of the horizontal to the bottom of the vertical?
How long does it generally take to create a footprint from a datasheet of that complexity?
I wouldn't mind having a go myself but there are too many dimensions confuse!
Thanks again for your help!
24th March 2012 03:22 AM
I have a rough draft of the package to send you. There are a few additions I will need to make after reading the data sheet some more. It will probably be best if I also make the symbol and connect the pins too. If you have already made the symbol, please post it here. Since I had started with Eagle 5.11, I stayed in 5.11 for this draft. I plan to convert everything to 6.0/6.1 for the final device. 6.1 has a nice tool for measuring, which will make checking the dimensions much easier than doing it the 5.11 way.
I have never tried to send single devices from a library. So, let's see how this works. I made a separate library called TempETO. You will want to make your own personal library, if you have not done that already.
I zipped the file, since .lbr is not supported here. You will need to unzip and copy to your Eagle library. In XP, you can probably just move it using explorer. Alternatively, within Eagle, you can use Control Panel to make a new library.
Eagle has some ways to copy libraries, but I am rusty at that. I usually just open the object, select all, cut (or copy group for 6.1). Then in library mode, click on package and enter the new package you want to transfer. Eagle will not find it and will ask if you want to create a new package. Click yes. You will get a black screen. Under View, select grid, and make it what you want. In this case, make it 1mm for major (count =1) and 0.05 mm for minor. Then paste.
As mentioned, I used two grids (1.0 mm and 1.2 mm with the minor at 0.05 for both) . In general that is a bad idea with Eagle. However, in this case, the 1.2 mm grid made it easy to get the signal pads centered. Since the fine divisions were the same, it did not create a problem.
Now let's assume you forget to change the grid before pasting. The default will probably be in inches. There is no way you will easily get this package to line up with that grid. Play with it, if you want. But then just delete and start over with the proper grid.
I named the package LGA66 for the number of pins. If there is another name you prefer, let me know.
What is your time frame for getting this done? Depending on weather, I have some outside chores that must get done if it doesn't rain. In that case, I won't be able to get back to this until tomorrow afternoon. I am on Eastern Daylight time, USA (GMT-5?).
PS, Those extra lines in Dimension layer were used as drawing aids. They will be deleted in the final version.
Last edited by jpanhalt; 24th March 2012 at 03:29 AM.
24th March 2012 01:50 PM
The footprint (aka package) is pretty much done. Note the unusual numbering pattern. It is numbered looking from the bottom, not top.
1) For the symbol, there are several options with respect to design. Some people put the pins in the same order as on the chip. That cannot be done exactly like that with this chip, because of the central pins. Do you want them grouped by function? (I prefer it that way for MCU's.)
2) The stencil is for applying solder paste. It is, I believe, the t-DOCU layer. I can add it or leave it off. Check with your assembler regarding the thickness, hence pad length to be used.
3) Pin 98 is in the ground-pin cluster; however, it is not supposed to be connected in any way. Do you want me just to leave it off? That will cause a gap in the numbering sequence. In smaller chips, I usually leave the unconnected pins shown and just not connect them. In this case, considering where Pin 98 is located, there may be a risk that it will get electrically connected to ground, which will not work. On the other hand, a ground pour might put copper there and that could be a problem. I would not use a ground pour under this chip, but if I did, I would make sure there was no copper under Pin 98.
4) Check with your assembler about solder mask. Do you want it excluded from around the inner pads? My concern is that a solder mask may raise the chip up enough that the inner pins will not get soldered. I have no experience with this type of chip.
I will begin work on the symbol and will group pins by function until I hear from you.
24th March 2012 04:23 PM
Here is a revised zip file with the package and symbol. I have not connected them yet.
Look at the package labeled "copy". I did that in case something got inadvertently moved. Please confirm the pin numbers are correct.
For the symbol, please check whether the direction assignments (e.g,. I/O, PWR) are correct. Also, now is the time to move the pins around, if you think a different arrangement would be easier to use. I though about putting all of the ground pins on a separate part of the symbol (like different gates of a logic device), but found only a few instances of that being done.
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